Hi Stefan:
> [...] > More specifically the PLT entries needs special handling for non-delay > targets, > the reason why they are not done in "compat-mode" is that it would > require one additional instruction space in the PLT entry and I felt that > wasn't > a price worth paying. Would it take a lot of work to add support for targets without a jump delay slot? I was hoping to run all your new code on my OR10 CPU in the near future. Thanks, rdiez _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
