On Wed, Oct 24, 2012 at 08:56:03AM +0100, R. Diez wrote: > Hi Stefan: > > > > [...] > > More specifically the PLT entries needs special handling for non-delay > > targets, > > the reason why they are not done in "compat-mode" is that it would > > require one additional instruction space in the PLT entry and I felt that > > wasn't > > a price worth paying. > > Would it take a lot of work to add support for targets without a jump delay > slot? I was hoping to run all your new code on my OR10 CPU in the near future. >
No, it shouldn't be very much work to add special handling of the plt entries for targets without delay-slot, just make the code slightly harder to read, that's why I've left it out initially. Besides, this is for the linux toolchain and I guess it'll be a while before we see Linux running on or10 ;) Stefan _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
