On 04/16/2014 02:54 PM, Stefan Kristiansson wrote: > Can't you use per-cpu register save-slots in shared memory? Yes, of course, but you will always need two "clean" registers. > I'm personally not very fond of the other alternatives, that's why I'm > being difficult here. > In my opinion it would even be more preferable to reserve another GPR > for kernel/OS use than the other alternatives. I understand your reservation here, but the hack is extremely dirty and a clean solution much more desireable. Just defining r30 and r31 (or any other) to be reserved for exception handling is a rather hard step from an ABI point of view, isn't it?
Meanwhile, I will continue and simply use ISR0 and ISR1 for this purpose. In mor1kx they currently serve exactly as what I need.. Bye, Stefan
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