FYI, I've updated the hme webrev at
http://cr.opensolaris.org/~gdamore/hme-x86/
This version actually *works* with x86 platform now. :-) I'm going to
run nightlies, get SPARC binaries, and then I'll offer up both SPARC and
x86 binaries for testing. I'd *really* like to get folks to review the
changes.
- Garrett
Garrett D'Amore wrote:
Dale Ghent wrote:
Awesome, Garrett. Just to recap:
1) is hme/qfe now Nemo-ized?
Yes, long since.
2) are there any long-hidden features of the HME phy now available,
such as trunking (ISTR this being available in the silicon but never
utilized in the DLPI driver)
The hme driver, when I converted it to Nemo, gained IP checksum
offload. Trunking is supported by the "aggr" driver in OpenSolaris.
I'll try dusting off my Ultra2 with sbus QFE this weekend and seeing
how this goes. Hopfully it'll still boot being that it's 10 years old
and hasn't seen electrons flowing into it for the past 2 years :)
Heh. Let me know how it goes. The hardest part is making sure you
have enough RAM with such old machines.
- Garrett
/dale
On May 1, 2009, at 2:42 AM, Garrett D'Amore wrote:
I've posted my first pass webrev for other people to check out:
http://cr.opensolaris.org/~gdamore/hme-x86/
The driver appears to work on my Sun Ultra 20 with a stock QFE
card. Because of the weird way this was packaged previously, there
are some "quirks" in the webrev, so I would really appreciate any
scrutiny from the packaging and install experts.
Of course, there are non-trivial changes to the driver source as
well -- the rather complex dvma/dma scheme has been replaced with a
much simpler bcopy in/out from preallocated buffers. Analysis shows
this is more performant on pretty much all supported systems.
Other changes:
* all the debug messaging has been removed... I don't think anyone
relies on it anymore, and dtrace is *so* much better at driver
debugging.
* the multi & broadcast checks are more efficient
* the way we get the ethernet addresses on x86 is ... tricky. the
ROM BAR is not mapped by BIOS, but we can find our "sibling" ebus
device (a PCI function on the same PCI logical device) which has the
ROM available through a regular CSR... so we use a trick to map that
instead.
* MIF register accesses are endian safe.
* DMA resource allocation only done on attach and detach, not
during hardware reinitialization
At this point, I've done only minimal testing on this, and I've not
gone back and verified that I've not totally horked the SPARC
platform. I don't *think* I have... but....
The reason that I'm sending this out early is to allow others to try
applying these patches, and to allow anyone else to pick up this
work in the event that I'm unable to drive it further.
-- Garrett
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