I'm told that Niagara T1 only has few VIS instructions which run in a
shared FPU and emulates others but Niagara T2 implements the full set
running in a per core FPU.

Olga

On Tue, Mar 30, 2010 at 5:13 PM, Garrett D'Amore <garr...@damore.org> wrote:
> On 03/30/10 12:34 AM, jf simon wrote:
>>
>> Hi,
>>
>> Bart Smaalders wrote:
>>
>>>
>>> The libc mem* routines already use VIS instructions to good effect on
>>> SPARC platforms, and platform teams regularly enhance these functions
>>> for both existing and new hardware.
>>>
>>
>> i want to use these VIS enhanced mem* functions on a Niagara T2
>> system.  do i need to specify specific options for sun studio in
>> CFLAGS? like "-sparcvis" ? or is it just a matter of linking with
>> the right libc?
>> in short how to be sure i am indeed using VIS?
>>
>
> Are you sure that the CPU on these systems actually supports the VIS
> instructions?
>
> I thought they were only available on UltraSPARC cpus (sun4u) and not sun4v.
>  Also, if they are available, you might want to make sure that they don't
> have the same limitations as floating point on these cpus (no parallelism --
> only one core can be executing floating point at a time) -- if they are
> available but without true MT support, then it may actually be
> disadvantageous to use them.
>
>    -- Garrett
>
>> thx a lot
>> -jfs
>>
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     { \/`o;====-    Olga Kryzhanovska   -====;o`\/ }
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 `'-..-| /     Solaris/BSD//C/C++ programmer   \ |-..-'`
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