2010/3/28 ольга крыжановская <olga.kryzhanov...@gmail.com>:
> I am looking for a Sun Studio C example for inline SPARC assembler
> which uses the VIS 'block copy' instruction to move a block of <n>
> bytes. Has anyone time to write such an example for me, please?
>
> Olga
> --
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Hi Olga, I got myself confused now.
But look at this:

http://books.google.com/books?id=L4oyNrsFBbsC&pg=PT69&lpg=PT69&dq=vis+block+memcpy&source=bl&ots=jl1be3e-ut&sig=v8RCH_S5LKdE0qcsYJ2WWNT0-_g&hl=ru&ei=kgSzS_rNEsqi_Abm6rX8CA&sa=X&oi=book_result&ct=result&resnum=3&ved=0CA4Q6AEwAjgK#v=onepage&q=vis%20block%20memcpy&f=false

Support exists in processors to accelerate block copying. Sun´s VIS instruction
set implemented in the UltraSPARC-series processors has a block-copying instruct
ion that bypasses the caches, while still maintaining consistency between the ca
ches and main memory. The bcopy(3C) and memcpy(3C) function calls both use this
mechanism on VIS-enabled processors AUTOMATICALLY.


and


http://books.google.com/books?id=0S8guIHHaiIC&pg=PA149&lpg=PA149&dq=vis+block+memcpy&source=bl&ots=cOhh1QOz_g&sig=V5qi3JWgPogmglvL83WeYIpXgrs&hl=ru&ei=kgSzS_rNEsqi_Abm6rX8CA&sa=X&oi=book_result&ct=result&resnum=6&ved=0CBoQ6AEwBTgK#v=onepage&q=vis%20block%20memcpy&f=false


The UltraSPARC-specific VIS block move instruction performs a 64-byte transfer t
hat is both cache coherent and nonpolluting. This feature IS USED by the platfor
m-specific libc bcopy, bzero, memcpy, memmove, memset, memcmp operations.



So does it really mean, all possible VIS-tuning is already done automatically?
This would explain, why one doesn´t notice a speed bumb.




%martin
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