On 5/2/07, Mike Kupfer <[EMAIL PROTECTED]> wrote:
>>>>> "Jason" == Jason King <[EMAIL PROTECTED]> writes: Jason> Unfortunately, I don't have access to Sparc machines outside of Jason> work, so sort of starting to manually assemble sparc instructions Jason> and feed them to the code, I have no way of testing the code, so Jason> I'm hoping to solicit some assistance with testing and Jason> validation. Hi Jason, did you get any responses to your query? I'd like to see the current closed-source disassembler replaced, but it's likely to be a few months before I'll have time to work with you. If you don't get any other offers, would it work for you to wait that long? mike
So far, only yours and Eric Shrock's. I have no issues waiting a few months. It might give me some time to refine my design (as what I posted was a starting point, but I think I have some ideas how to improve it). In the meantime, I do have some questions about the current behavior that I'm hoping someone with access to the existing implementation can comment on. Since I don't have access to a sparc running Nevada at this time, I have no easy way I can think of to test these myself: There are a few instructions that were renamed V8 -> V9 (for example subx -> subc), but otherwise appear to be identical. Should (in this example) subx be used in V8 mode while subc in V9 or does it not matter? There are other instructions that were removed V8->V9 (for example, all the Coprocessor Operation functions). In some cases these were replaced with new instructions (for example some overlap with the VIS instructions). I'm guessing in this case in V8 mode, the CPops should show up, but not in V9. Is this a correct assumption? Is the difference between DIS_SPARC_V9 and DIS_SPARC_V9_SGI modes only the existance of the VIS instructions? Right now I've been using http://opensparc-t1.sunsource.net/specs/UA2005-current-draft-P-EXT.pdf for the VIS information (along with the sparcv8 & v9 manuals from sparc.org). Is there any other public documentation that might have information on instructions not found here, or does it look between the three documents to be fairly exhaustive defining the instructions? Similarly, should DIS_DEFAULT do anything but return an error? Are synthetic instructions used in the output? For example is 'subcc %i1, 5, %g0' actually disassembled as 'cmp %i1, 5' ? If so, there are a few cases where the synthetic instruction mapping can translate into multiple instructions. For example: 'set <value>, %register' may translate into: any of: sethi %hi(value), %register (if value & 0x1fff) == 0) or %g0, <value>, %register (-4096 <= value <= 4095) sethi %hi(value), %register; or %register, %lo(value), %register otherwise. In the last instance, is the current code treating the sethi + or together as a single instruction?
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