Hi Bruno,
On Thursday 01 July 2010 17:08:33 Bruno Randolf wrote:
> hi!
>
> it seems the problem was alchemy_gpio2_enable(); everything works fine when
> i remove that call. maybe the problem is that PCI_SERR and PCI_RST# are
> connected to the GPIO2 block and they don't like the reset of GPIO2?
>
> in the following patch i also remove the now unnecessary au_sync from
> udelay(), as manuel lauss pointed out, and some dead code. florian, could
> you commit it to the backfire branch?
Sure, thanks for the patch.
>
> manuel, if you agree with this patch, i'll post it to linux-mips, too.
>
> bruno
>
> diff --git a/arch/mips/alchemy/mtx-1/board_setup.c
> b/arch/mips/alchemy/mtx-1/board_setup.c
> index 45b61c9..17140ac 100644
> --- a/arch/mips/alchemy/mtx-1/board_setup.c
> +++ b/arch/mips/alchemy/mtx-1/board_setup.c
> @@ -56,8 +56,6 @@ void __init board_setup(void)
> }
> #endif
>
> - alchemy_gpio2_enable();
> -
> #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
> /* Enable USB power switch */
> alchemy_gpio_direction_output(204, 0);
> @@ -92,20 +90,12 @@ void __init board_setup(void)
> int
> mtx1_pci_idsel(unsigned int devsel, int assert)
> {
> -#define MTX_IDSEL_ONLY_0_AND_3 0
> -#if MTX_IDSEL_ONLY_0_AND_3
> - if (devsel != 0 && devsel != 3) {
> - printk(KERN_ERR "*** not 0 or 3\n");
> - return 0;
> - }
> -#endif
> -
> if (assert && devsel != 0)
> /* Suppress signal to Cardbus */
> gpio_set_value(1, 0); /* set EXT_IO3 OFF */
> else
> gpio_set_value(1, 1); /* set EXT_IO3 ON */
>
> - au_sync_udelay(1);
> + udelay(1);
> return 1;
> }
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