Hi, This patch fix external IRQs on 6358 platform. They are mapped throw 33 to 37 IRQ lines.
Kind Regards, Miguel
>From b0507980e6f57c1cde8842517f0ae58bf806a1c3 Mon Sep 17 00:00:00 2001 From: Miguel Gaio <[email protected]> Date: Fri, 19 Nov 2010 10:05:04 +0100 Subject: [PATCH] * [brcm63xx] fix external interrupts on 6358 platform --- .../patches-2.6.35/006-external-interrupt.patch | 106 ++++++++++++++++++++ 1 files changed, 106 insertions(+), 0 deletions(-) create mode 100644 target/linux/brcm63xx/patches-2.6.35/006-external-interrupt.patch diff --git a/target/linux/brcm63xx/patches-2.6.35/006-external-interrupt.patch b/target/linux/brcm63xx/patches-2.6.35/006-external-interrupt.patch new file mode 100644 index 0000000..7db72e0 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/006-external-interrupt.patch @@ -0,0 +1,106 @@ +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -109,7 +109,7 @@ static void bcm63xx_external_irq_mask(un + { + u32 reg; + +- irq -= IRQ_EXT_BASE; ++ irq -= bcm63xx_irq_ext_base(); + reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); + reg &= ~EXTIRQ_CFG_MASK(irq); + bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); +@@ -119,7 +119,7 @@ static void bcm63xx_external_irq_unmask( + { + u32 reg; + +- irq -= IRQ_EXT_BASE; ++ irq -= bcm63xx_irq_ext_base(); + reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); + reg |= EXTIRQ_CFG_MASK(irq); + bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); +@@ -129,7 +129,7 @@ static void bcm63xx_external_irq_clear(u + { + u32 reg; + +- irq -= IRQ_EXT_BASE; ++ irq -= bcm63xx_irq_ext_base(); + reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); + reg |= EXTIRQ_CFG_CLEAR(irq); + bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); +@@ -137,7 +137,10 @@ static void bcm63xx_external_irq_clear(u + + static unsigned int bcm63xx_external_irq_startup(unsigned int irq) + { +- set_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); ++ if (BCMCPU_IS_6358()) ++ bcm63xx_internal_irq_unmask(irq); ++ else ++ set_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); + irq_enable_hazard(); + bcm63xx_external_irq_unmask(irq); + return 0; +@@ -146,7 +149,10 @@ static unsigned int bcm63xx_external_irq + static void bcm63xx_external_irq_shutdown(unsigned int irq) + { + bcm63xx_external_irq_mask(irq); +- clear_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); ++ if (BCMCPU_IS_6358()) ++ bcm63xx_internal_irq_mask(irq); ++ else ++ clear_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); + irq_disable_hazard(); + } + +@@ -156,7 +162,7 @@ static int bcm63xx_external_irq_set_type + u32 reg; + struct irq_desc *desc = irq_desc + irq; + +- irq -= IRQ_EXT_BASE; ++ irq -= bcm63xx_irq_ext_base(); + + flow_type &= IRQ_TYPE_SENSE_MASK; + +@@ -238,6 +244,7 @@ static struct irqaction cpu_ip2_cascade_ + + void __init arch_init_irq(void) + { ++ int irq_ext_base = bcm63xx_irq_ext_base(); + int i; + + mips_cpu_irq_init(); +@@ -245,7 +252,7 @@ void __init arch_init_irq(void) + set_irq_chip_and_handler(i, &bcm63xx_internal_irq_chip, + handle_level_irq); + +- for (i = IRQ_EXT_BASE; i < IRQ_EXT_BASE + 4; ++i) ++ for (i = irq_ext_base; i < irq_ext_base + 4; ++i) + set_irq_chip_and_handler(i, &bcm63xx_external_irq_chip, + handle_edge_irq); + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h +@@ -6,10 +6,19 @@ + #define IRQ_MIPS_BASE 0 + #define IRQ_INTERNAL_BASE 8 + +-#define IRQ_EXT_BASE (IRQ_MIPS_BASE + 3) +-#define IRQ_EXT_0 (IRQ_EXT_BASE + 0) +-#define IRQ_EXT_1 (IRQ_EXT_BASE + 1) +-#define IRQ_EXT_2 (IRQ_EXT_BASE + 2) +-#define IRQ_EXT_3 (IRQ_EXT_BASE + 3) ++static inline unsigned long bcm63xx_irq_ext_base(void) ++{ ++ switch (bcm63xx_get_cpu_id()) { ++ case BCM6358_CPU_ID: ++ return IRQ_MIPS_BASE + 33; ++ default: ++ return IRQ_MIPS_BASE + 3; ++ } ++} ++ ++#define IRQ_EXT_0 (bcm63xx_irq_ext_base() + 0) ++#define IRQ_EXT_1 (bcm63xx_irq_ext_base() + 1) ++#define IRQ_EXT_2 (bcm63xx_irq_ext_base() + 2) ++#define IRQ_EXT_3 (bcm63xx_irq_ext_base() + 3) + + #endif /* ! BCM63XX_IRQ_H_ */ -- 1.7.2.3
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