Hi Daniel,
> I started to port OpenWrt to the Rt3352F. I got a sample of each, Rt3352F,
> Rt3052F and Rt3050 here to test.
> The Rt3352F is a MIPS24Kc and therefore very similar to the Rt3052F. The main
> differences are:
> - the main CPU clock is @400MHz (compared to 384MHz on the Rt3052F)
> - it got regular OHCI/EHCI USB instead of dwc_otg
>
> I'm asking you to advise and comment on the work I did for now.
> The clockrate cannot be identified from the CPUCLK register for all the chip
> family, so I had to make another distinction based on SYSC_REG_CHIP_NAMEx
> registers. It doesn't look very nice to have that in clock.c, so maybe I will
> create a bunch of makros like RT3XXX_IS_RT3352F, RT3XXX_IS_RT3052F which
> returns
> true if we got that cpu. I'm just not sure yet where would be the right place
> to
> put those makros...
Use inline functions insted of macros, and put them into
'target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h'
>
> diff --git
> a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
> b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
> index 64918fe..e71537a 100644
> ---
> a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
> +++
> b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
> @@ -63,8 +63,8 @@
>
> #define SYSTEM_CONFIG_CPUCLK_SHIFT 18
> #define SYSTEM_CONFIG_CPUCLK_MASK 0x1
> -#define SYSTEM_CONFIG_CPUCLK_320 0x0
> -#define SYSTEM_CONFIG_CPUCLK_384 0x1
> +#define SYSTEM_CONFIG_CPUCLK_LOW 0x0
> +#define SYSTEM_CONFIG_CPUCLK_HIGH 0x1
> #define SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT 2
> #define SYSTEM_CONFIG_SRAM_CS0_MODE_MASK 0x3
> #define SYSTEM_CONFIG_SRAM_CS0_MODE_NORMAL 0
>
> diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
> b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
> index dff3738..177a839 100644
> --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
> +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
> @@ -31,21 +31,33 @@ static struct clk rt305x_uart_clk;
> void __init rt305x_clocks_init(void)
> {
> u32 t;
> + char n0, n1;
>
> t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
> t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
>
> + n0 = (char) ((rt305x_sysc_rr(SYSC_REG_CHIP_NAME0) >> 24) & 0xff);
> + n1 = (char) ((rt305x_sysc_rr(SYSC_REG_CHIP_NAME1) >> 8) & 0xff);
> +
> switch (t) {
> - case SYSTEM_CONFIG_CPUCLK_320:
> - rt305x_cpu_clk.rate = 320000000;
> + case SYSTEM_CONFIG_CPUCLK_LOW:
> + if ( n0 == '3' && n1 == '2' ) // Rt3352F
> + rt305x_cpu_clk.rate = 400000000;
> + else // Rt3050, Rt3350
> + rt305x_cpu_clk.rate = 320000000;
> break;
> - case SYSTEM_CONFIG_CPUCLK_384:
> - rt305x_cpu_clk.rate = 384000000;
> + case SYSTEM_CONFIG_CPUCLK_HIGH: // Rt3352F
> + rt305x_cpu_clk.rate = 384000000;
> break;
> }
>
> rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 3;
> - rt305x_uart_clk.rate = rt305x_sys_clk.rate;
> +
> + if ( n0 == '3' && n1 == '2' ) // Rt3352F
> + rt305x_uart_clk.rate = rt305x_cpu_clk.rate / 10;
> + else // Rt3050, Rt3052F, Rt3350
> + rt305x_uart_clk.rate = rt305x_sys_clk.rate;
> +
> rt305x_wdt_clk.rate = rt305x_sys_clk.rate;
> }
The basic idea is good, however the RT3352 uses different bit in SYSCFG0
register AFAIK.
> The sample I got of the Rt3352F got 128MB of RAM, so I changed to maximum
> amount
> of RAM, there doesn't seem to be a problem with the Rt3052F and Rt3050 sample
> I
> got, but both of them got only 32MB. Someone who got any Rt30xx with 64MB
> (e.g.
> fonera2.0n) should give this patch a try and see if the memory size is still
> detected correctly:
>
> diff --git
> a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h
>
> b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h
> index c3206ec..6fad746 100644
> ---
> a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h
> +++
> b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h
> @@ -13,6 +13,6 @@
>
> #define RALINK_SOC_SDRAM_BASE 0
> #define RALINK_SOC_MEM_SIZE_MIN (2 * 1024 * 1024)
> -#define RALINK_SOC_MEM_SIZE_MAX (64 * 1024 * 1024)
> +#define RALINK_SOC_MEM_SIZE_MAX (128 * 1024 * 1024)
The memory range between 0x0400000 and 0x10000000 is reserved on RT3050/RT3052
and this change may cause invalid access exception on those SoCs.
The attached patches should solve the aforementioned issues without breaking
anything. I have tested it on RT2880/RT3050/RT3662.
>
> #endif /* __RT288X_RALINK_SOC_H */
>
>
> - From what I see in wive-ng (containing the RaLink SDK) and also DD-WRT
> sources,
> all needed for ohci/ehci usb to work is adding the platform resources. The
> main
> question I got here is: where is this supposed to happen? I somehow got the
> feeling that doing it in this way works, but it's not the right place:
> http://svn.dd-wrt.com:8000/browser/src/linux/universal/linux-3.2/drivers/usb/host/ehci-rt3xxx.c
>
> for two reasons:
> - it relies in having asm/rt2880/rt_mmap.h which is part of RaLink SDK and
> obsoleted by include/asm/mach-ralink/rt305x.h
> - instead of having an additional include in the ehci driver, there should be
> function in arch/mips/ralink/rt305x/devices.c to allocate and initialize the
> ehci and ohci controller with only minor changes needed in the actual driver.
It is definitely not the right place. I have added support for the OHCI/EHCI
controller of the RT3662/RT3883 SoCs recently, and I assume that the platform
driver can be used for RT3352 as well. In order to be able to use that, the
rt305x_register_usb function should be modified to register different platform
devices on RT3352.
Regards,
Gabor
>From 04d73a9f418194e79cb46a36458096b9366fe53f Mon Sep 17 00:00:00 2001
From: Gabor Juhos <[email protected]>
Date: Wed, 22 Feb 2012 11:24:35 +0100
Subject: [PATCH 1/6] ramips: introduce ramips_soc_prom_init and move SoC detection into that
---
.../arch/mips/include/asm/mach-ralink/common.h | 1 +
.../arch/mips/include/asm/mach-ralink/rt288x.h | 2 --
.../arch/mips/include/asm/mach-ralink/rt305x.h | 2 --
.../arch/mips/include/asm/mach-ralink/rt3883.h | 2 --
.../ramips/files/arch/mips/ralink/common/prom.c | 2 ++
.../ramips/files/arch/mips/ralink/rt288x/rt288x.c | 9 +++++----
.../ramips/files/arch/mips/ralink/rt288x/setup.c | 1 -
.../ramips/files/arch/mips/ralink/rt305x/rt305x.c | 9 +++++----
.../ramips/files/arch/mips/ralink/rt305x/setup.c | 1 -
.../ramips/files/arch/mips/ralink/rt3883/rt3883.c | 9 +++++----
.../ramips/files/arch/mips/ralink/rt3883/setup.c | 1 -
11 files changed, 18 insertions(+), 21 deletions(-)
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h
index 939062b..7be24f7 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h
@@ -15,6 +15,7 @@ extern unsigned char ramips_sys_type[RAMIPS_SYS_TYPE_LEN];
void ramips_intc_irq_init(unsigned intc_base, unsigned irq, unsigned irq_base);
u32 ramips_intc_get_status(void);
+void ramips_soc_prom_init(void);
void ramips_soc_setup(void);
void ramips_early_serial_setup(int line, unsigned base, unsigned freq,
unsigned irq);
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
index 29c7a72..ff6c82e 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
@@ -17,8 +17,6 @@
#include <linux/init.h>
#include <linux/io.h>
-void rt288x_detect_sys_type(void);
-
#define RT288X_CPU_IRQ_BASE 0
#define RT288X_INTC_IRQ_BASE 8
#define RT288X_INTC_IRQ_COUNT 32
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
index d1a4df9..2e3f9fc 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
@@ -16,8 +16,6 @@
#include <linux/init.h>
#include <linux/io.h>
-void rt305x_detect_sys_type(void);
-
#define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
#define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h
index 2a88bb8..cf8fb6f 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883.h
@@ -16,8 +16,6 @@
#include <linux/init.h>
#include <linux/io.h>
-void rt3883_detect_sys_type(void);
-
#define RT3883_MEM_SIZE_MIN (2 * 1024 * 1024)
#define RT3883_MEM_SIZE_MAX (256 * 1024 * 1024)
diff --git a/target/linux/ramips/files/arch/mips/ralink/common/prom.c b/target/linux/ramips/files/arch/mips/ralink/common/prom.c
index fdbcb79..d3f884b 100644
--- a/target/linux/ramips/files/arch/mips/ralink/common/prom.c
+++ b/target/linux/ramips/files/arch/mips/ralink/common/prom.c
@@ -143,6 +143,8 @@ void __init prom_init(void)
char **envp;
char **argv;
+ ramips_soc_prom_init();
+
printk(KERN_DEBUG
"prom: fw_arg0=%08x, fw_arg1=%08x, fw_arg2=%08x, fw_arg3=%08x\n",
(unsigned int)fw_arg0, (unsigned int)fw_arg1,
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c
index 53b1a69..633e83d 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c
@@ -23,15 +23,16 @@
void __iomem * rt288x_sysc_base;
void __iomem * rt288x_memc_base;
-void __init rt288x_detect_sys_type(void)
+void __init ramips_soc_prom_init(void)
{
+ void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT2880_SYSC_BASE);
u32 n0;
u32 n1;
u32 id;
- n0 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME0);
- n1 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME1);
- id = rt288x_sysc_rr(SYSC_REG_CHIP_ID);
+ n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
+ n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
+ id = __raw_readl(sysc + SYSC_REG_CHIP_ID);
snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
"Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c b/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c
index 65e187d..be474b5 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c
@@ -52,7 +52,6 @@ void __init ramips_soc_setup(void)
rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE);
rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE);
- rt288x_detect_sys_type();
rt288x_clocks_init();
clk = clk_get(NULL, "cpu");
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
index 5916888..fa0d0f6 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
@@ -23,15 +23,16 @@
void __iomem * rt305x_sysc_base;
void __iomem * rt305x_memc_base;
-void __init rt305x_detect_sys_type(void)
+void __init ramips_soc_prom_init(void)
{
+ void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
u32 n0;
u32 n1;
u32 id;
- n0 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME0);
- n1 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME1);
- id = rt305x_sysc_rr(SYSC_REG_CHIP_ID);
+ n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
+ n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
+ id = __raw_readl(sysc + SYSC_REG_CHIP_ID);
snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
"Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/setup.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/setup.c
index 6913006..5a069db 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/setup.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/setup.c
@@ -52,7 +52,6 @@ void __init ramips_soc_setup(void)
rt305x_sysc_base = ioremap_nocache(RT305X_SYSC_BASE, PAGE_SIZE);
rt305x_memc_base = ioremap_nocache(RT305X_MEMC_BASE, PAGE_SIZE);
- rt305x_detect_sys_type();
rt305x_clocks_init();
clk = clk_get(NULL, "cpu");
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c b/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c
index 6e75b39..8f59948 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c
@@ -22,15 +22,16 @@
void __iomem * rt3883_sysc_base;
void __iomem * rt3883_memc_base;
-void __init rt3883_detect_sys_type(void)
+void __init ramips_soc_prom_init(void)
{
+ void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT3883_SYSC_BASE);
u32 n0;
u32 n1;
u32 id;
- n0 = rt3883_sysc_rr(RT3883_SYSC_REG_CHIPID0_3);
- n1 = rt3883_sysc_rr(RT3883_SYSC_REG_CHIPID4_7);
- id = rt3883_sysc_rr(RT3883_SYSC_REG_REVID);
+ n0 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID0_3);
+ n1 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID4_7);
+ id = __raw_readl(sysc + RT3883_SYSC_REG_REVID);
snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
"Ralink %c%c%c%c%c%c%c%c ver:%u eco:%u",
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt3883/setup.c b/target/linux/ramips/files/arch/mips/ralink/rt3883/setup.c
index f4c7296..6e037a7 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt3883/setup.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt3883/setup.c
@@ -52,7 +52,6 @@ void __init ramips_soc_setup(void)
rt3883_sysc_base = ioremap_nocache(RT3883_SYSC_BASE, PAGE_SIZE);
rt3883_memc_base = ioremap_nocache(RT3883_MEMC_BASE, PAGE_SIZE);
- rt3883_detect_sys_type();
rt3883_clocks_init();
clk = clk_get(NULL, "cpu");
--
1.7.2.1
>From ed7447ffe5949ddf8515fbe41b891342f24b6d6e Mon Sep 17 00:00:00 2001
From: Gabor Juhos <[email protected]>
Date: Wed, 22 Feb 2012 10:22:18 +0100
Subject: [PATCH 2/6] ramips: replace RALINK_SOC_* macros with global variables
---
.../arch/mips/include/asm/mach-ralink/common.h | 3 +++
.../arch/mips/include/asm/mach-ralink/rt288x.h | 3 +++
.../include/asm/mach-ralink/rt288x/ralink_soc.h | 18 ------------------
.../include/asm/mach-ralink/rt305x/ralink_soc.h | 18 ------------------
.../include/asm/mach-ralink/rt3883/ralink_soc.h | 18 ------------------
.../ramips/files/arch/mips/ralink/common/prom.c | 17 ++++++++++-------
.../ramips/files/arch/mips/ralink/common/setup.c | 5 ++---
.../ramips/files/arch/mips/ralink/rt288x/rt288x.c | 4 ++++
.../ramips/files/arch/mips/ralink/rt305x/rt305x.c | 4 ++++
.../ramips/files/arch/mips/ralink/rt3883/rt3883.c | 4 ++++
10 files changed, 30 insertions(+), 64 deletions(-)
delete mode 100644 target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h
delete mode 100644 target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h
delete mode 100644 target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883/ralink_soc.h
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h
index 7be24f7..111dd06 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/common.h
@@ -11,6 +11,9 @@
#define RAMIPS_SYS_TYPE_LEN 64
extern unsigned char ramips_sys_type[RAMIPS_SYS_TYPE_LEN];
+extern unsigned long ramips_mem_base;
+extern unsigned long ramips_mem_size_min;
+extern unsigned long ramips_mem_size_max;
void ramips_intc_irq_init(unsigned intc_base, unsigned irq, unsigned irq_base);
u32 ramips_intc_get_status(void);
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
index ff6c82e..10d7263 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h
@@ -17,6 +17,9 @@
#include <linux/init.h>
#include <linux/io.h>
+#define RT288X_MEM_SIZE_MIN (2 * 1024 * 1024)
+#define RT288X_MEM_SIZE_MAX (128 * 1024 * 1024)
+
#define RT288X_CPU_IRQ_BASE 0
#define RT288X_INTC_IRQ_BASE 8
#define RT288X_INTC_IRQ_COUNT 32
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h
deleted file mode 100644
index 73301e2..0000000
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Ralink RT288x specific SOC defines
- *
- * Copyright (C) 2009 Gabor Juhos <[email protected]>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef __RT288X_RALINK_SOC_H
-#define __RT288X_RALINK_SOC_H
-
-#define RALINK_SOC_SDRAM_BASE 0x08000000
-#define RALINK_SOC_MEM_SIZE_MIN (2 * 1024 * 1024)
-#define RALINK_SOC_MEM_SIZE_MAX (128 * 1024 * 1024)
-
-#endif /* __RT288X_RALINK_SOC_H */
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h
deleted file mode 100644
index c3206ec..0000000
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Ralink RT305x specific SOC defines
- *
- * Copyright (C) 2009 Gabor Juhos <[email protected]>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef __RT288X_RALINK_SOC_H
-#define __RT288X_RALINK_SOC_H
-
-#define RALINK_SOC_SDRAM_BASE 0
-#define RALINK_SOC_MEM_SIZE_MIN (2 * 1024 * 1024)
-#define RALINK_SOC_MEM_SIZE_MAX (64 * 1024 * 1024)
-
-#endif /* __RT288X_RALINK_SOC_H */
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883/ralink_soc.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883/ralink_soc.h
deleted file mode 100644
index 8a080b7..0000000
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883/ralink_soc.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Ralink RT3662/RT3883 specific SOC defines
- *
- * Copyright (C) 2011-2012 Gabor Juhos <[email protected]>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#ifndef _RT3883_RALINK_SOC_H
-#define _RT3883_RALINK_SOC_H
-
-#define RALINK_SOC_SDRAM_BASE 0
-#define RALINK_SOC_MEM_SIZE_MIN (2 * 1024 * 1024)
-#define RALINK_SOC_MEM_SIZE_MAX (256 * 1024 * 1024)
-
-#endif /* _RT3883_RALINK_SOC_H */
diff --git a/target/linux/ramips/files/arch/mips/ralink/common/prom.c b/target/linux/ramips/files/arch/mips/ralink/common/prom.c
index d3f884b..26169d3 100644
--- a/target/linux/ramips/files/arch/mips/ralink/common/prom.c
+++ b/target/linux/ramips/files/arch/mips/ralink/common/prom.c
@@ -18,26 +18,29 @@
#include <asm/mach-ralink/common.h>
#include <asm/mach-ralink/machine.h>
-#include <ralink_soc.h>
+
+unsigned long ramips_mem_base;
+unsigned long ramips_mem_size_min;
+unsigned long ramips_mem_size_max;
static inline void *to_ram_addr(void *addr)
{
u32 base;
- base = KSEG0ADDR(RALINK_SOC_SDRAM_BASE);
+ base = KSEG0ADDR(ramips_mem_base);
if (((u32) addr > base) &&
- ((u32) addr < (base + RALINK_SOC_MEM_SIZE_MAX)))
+ ((u32) addr < (base + ramips_mem_size_max)))
return addr;
- base = KSEG1ADDR(RALINK_SOC_SDRAM_BASE);
+ base = KSEG1ADDR(ramips_mem_base);
if (((u32) addr > base) &&
- ((u32) addr < (base + RALINK_SOC_MEM_SIZE_MAX)))
+ ((u32) addr < (base + ramips_mem_size_max)))
return addr;
/* some U-Boot variants uses physical addresses */
- base = RALINK_SOC_SDRAM_BASE;
+ base = ramips_mem_base;
if (((u32) addr > base) &&
- ((u32) addr < (base + RALINK_SOC_MEM_SIZE_MAX)))
+ ((u32) addr < (base + ramips_mem_size_max)))
return (void *)KSEG0ADDR(addr);
return NULL;
diff --git a/target/linux/ramips/files/arch/mips/ralink/common/setup.c b/target/linux/ramips/files/arch/mips/ralink/common/setup.c
index 5f7cf14..0d6b8d8 100644
--- a/target/linux/ramips/files/arch/mips/ralink/common/setup.c
+++ b/target/linux/ramips/files/arch/mips/ralink/common/setup.c
@@ -19,7 +19,6 @@
#include <asm/mach-ralink/common.h>
#include <asm/mach-ralink/machine.h>
-#include <ralink_soc.h>
unsigned char ramips_sys_type[RAMIPS_SYS_TYPE_LEN];
@@ -34,13 +33,13 @@ static void __init detect_mem_size(void)
void *base;
base = (void *) KSEG1ADDR(detect_mem_size);
- for (size = RALINK_SOC_MEM_SIZE_MIN; size < RALINK_SOC_MEM_SIZE_MAX;
+ for (size = ramips_mem_size_min; size < ramips_mem_size_max;
size <<= 1 ) {
if (!memcmp(base, base + size, 1024))
break;
}
- add_memory_region(RALINK_SOC_SDRAM_BASE, size, BOOT_MEM_RAM);
+ add_memory_region(ramips_mem_base, size, BOOT_MEM_RAM);
}
void __init ramips_early_serial_setup(int line, unsigned base, unsigned freq,
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c
index 633e83d..c51ad98 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c
@@ -42,6 +42,10 @@ void __init ramips_soc_prom_init(void)
(char) ((n1 >> 16) & 0xff), (char) ((n1 >> 24) & 0xff),
(id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
(id & CHIP_ID_REV_MASK));
+
+ ramips_mem_base = RT2880_SDRAM_BASE;
+ ramips_mem_size_min = RT288X_MEM_SIZE_MIN;
+ ramips_mem_size_max = RT288X_MEM_SIZE_MAX;
}
static struct ramips_gpio_chip rt288x_gpio_chips[] = {
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
index fa0d0f6..9568678 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
@@ -42,6 +42,10 @@ void __init ramips_soc_prom_init(void)
(char) ((n1 >> 16) & 0xff), (char) ((n1 >> 24) & 0xff),
(id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
(id & CHIP_ID_REV_MASK));
+
+ ramips_mem_base = RT305X_SDRAM_BASE;
+ ramips_mem_size_min = RT305X_MEM_SIZE_MIN;
+ ramips_mem_size_max = RT305X_MEM_SIZE_MAX;
}
static struct ramips_gpio_chip rt305x_gpio_chips[] = {
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c b/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c
index 8f59948..9f91412 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt3883/rt3883.c
@@ -41,6 +41,10 @@ void __init ramips_soc_prom_init(void)
(char) ((n1 >> 16) & 0xff), (char) ((n1 >> 24) & 0xff),
(id >> RT3883_REVID_VER_ID_SHIFT) & RT3883_REVID_VER_ID_MASK,
(id & RT3883_REVID_ECO_ID_MASK));
+
+ ramips_mem_base = RT3883_SDRAM_BASE;
+ ramips_mem_size_min = RT3883_MEM_SIZE_MIN;
+ ramips_mem_size_max = RT3883_MEM_SIZE_MAX;
}
static struct ramips_gpio_chip rt3883_gpio_chips[] = {
--
1.7.2.1
>From 06315dadf13b69ae4a402130d991a33b9592f104 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <[email protected]>
Date: Wed, 22 Feb 2012 10:06:47 +0100
Subject: [PATCH 3/6] ramips: rt305x: allow to detect the exact SoC type
---
.../arch/mips/include/asm/mach-ralink/rt305x.h | 35 +++++++++++++++++
.../ramips/files/arch/mips/ralink/rt305x/rt305x.c | 41 ++++++++++++++++++++
2 files changed, 76 insertions(+), 0 deletions(-)
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
index 2e3f9fc..2c62a16 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
@@ -16,6 +16,41 @@
#include <linux/init.h>
#include <linux/io.h>
+enum rt305x_soc_type {
+ RT305X_SOC_UNKNOWN = 0,
+ RT305X_SOC_RT3050,
+ RT305X_SOC_RT3052,
+ RT305X_SOC_RT3350,
+ RT305X_SOC_RT3352,
+};
+
+extern enum rt305x_soc_type rt305x_soc;
+
+static inline int soc_is_rt3050(void)
+{
+ return rt305x_soc == RT305X_SOC_RT3050;
+}
+
+static inline int soc_is_rt3052(void)
+{
+ return rt305x_soc == RT305X_SOC_RT3052;
+}
+
+static inline int soc_is_rt305x(void)
+{
+ return soc_is_rt3050() || soc_is_rt3052();
+}
+
+static inline int soc_is_rt3350(void)
+{
+ return rt305x_soc == RT305X_SOC_RT3350;
+}
+
+static inline int soc_is_rt3352(void)
+{
+ return rt305x_soc == RT305X_SOC_RT3352;
+}
+
#define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
#define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
index 9568678..af7e35e 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
@@ -22,6 +22,36 @@
void __iomem * rt305x_sysc_base;
void __iomem * rt305x_memc_base;
+enum rt305x_soc_type rt305x_soc;
+
+struct rt305x_soc_id {
+ u32 n0;
+ u32 n1;
+ enum rt305x_soc_type soc;
+};
+
+static struct rt305x_soc_id rt305x_soc_ids[] = {
+ {
+ .n0 = 0x30335452,
+ .n1 = 0x20203035,
+ .soc = RT305X_SOC_RT3050,
+ },
+ {
+ .n0 = 0x30335452,
+ .n1 = 0x20203235,
+ .soc = RT305X_SOC_RT3052,
+ },
+ {
+ .n0 = 0x33335452,
+ .n1 = 0x20203035,
+ .soc = RT305X_SOC_RT3350,
+ },
+ {
+ .n0 = 0x33335452,
+ .n1 = 0x20203235,
+ .soc = RT305X_SOC_RT3352,
+ },
+};
void __init ramips_soc_prom_init(void)
{
@@ -29,6 +59,7 @@ void __init ramips_soc_prom_init(void)
u32 n0;
u32 n1;
u32 id;
+ int i;
n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
@@ -43,6 +74,16 @@ void __init ramips_soc_prom_init(void)
(id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
(id & CHIP_ID_REV_MASK));
+ for (i = 0; i < ARRAY_SIZE(rt305x_soc_ids); i++) {
+ struct rt305x_soc_id *sid;
+
+ sid = &rt305x_soc_ids[i];
+ if (n0 == sid->n0 && n1 == sid->n1) {
+ rt305x_soc = sid->soc;
+ break;
+ }
+ }
+
ramips_mem_base = RT305X_SDRAM_BASE;
ramips_mem_size_min = RT305X_MEM_SIZE_MIN;
ramips_mem_size_max = RT305X_MEM_SIZE_MAX;
--
1.7.2.1
>From a530c4918dfd2fa75334f79b7ccaebb5e85d4ebb Mon Sep 17 00:00:00 2001
From: Gabor Juhos <[email protected]>
Date: Wed, 22 Feb 2012 12:26:01 +0100
Subject: [PATCH 4/6] ramips: rt305x: use different memory size setup for RT3352
---
.../arch/mips/include/asm/mach-ralink/rt305x.h | 3 +++
.../ramips/files/arch/mips/ralink/rt305x/rt305x.c | 12 ++++++++++--
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
index 2c62a16..0afbb2f 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h
@@ -54,6 +54,9 @@ static inline int soc_is_rt3352(void)
#define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
#define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
+#define RT3352_MEM_SIZE_MIN (2 * 1024 * 1024)
+#define RT3352_MEM_SIZE_MAX (256 * 1024 * 1024)
+
#define RT305X_CPU_IRQ_BASE 0
#define RT305X_INTC_IRQ_BASE 8
#define RT305X_INTC_IRQ_COUNT 32
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
index af7e35e..26e5bc8 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
@@ -85,8 +85,16 @@ void __init ramips_soc_prom_init(void)
}
ramips_mem_base = RT305X_SDRAM_BASE;
- ramips_mem_size_min = RT305X_MEM_SIZE_MIN;
- ramips_mem_size_max = RT305X_MEM_SIZE_MAX;
+
+ if (soc_is_rt305x() || soc_is_rt3350()) {
+ ramips_mem_size_min = RT305X_MEM_SIZE_MIN;
+ ramips_mem_size_max = RT305X_MEM_SIZE_MAX;
+ } else if (soc_is_rt3352()) {
+ ramips_mem_size_min = RT3352_MEM_SIZE_MIN;
+ ramips_mem_size_max = RT3352_MEM_SIZE_MAX;
+ } else {
+ BUG();
+ }
}
static struct ramips_gpio_chip rt305x_gpio_chips[] = {
--
1.7.2.1
>From 900e6f1b1853865ad9e71694ae1222f70ccd80fa Mon Sep 17 00:00:00 2001
From: Gabor Juhos <[email protected]>
Date: Wed, 22 Feb 2012 13:10:43 +0100
Subject: [PATCH 5/6] ramips: rt305x: rename SYSTEM_CONFIG_* defines to RT305X_SYSCFG_*
---
.../mips/include/asm/mach-ralink/rt305x_regs.h | 18 +++++++++---------
.../ramips/files/arch/mips/ralink/rt305x/clock.c | 6 +++---
.../ramips/files/arch/mips/ralink/rt305x/devices.c | 4 ++--
3 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
index 64918fe..1ba5535 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
@@ -61,15 +61,15 @@
#define CHIP_ID_ID_SHIFT 8
#define CHIP_ID_REV_MASK 0xff
-#define SYSTEM_CONFIG_CPUCLK_SHIFT 18
-#define SYSTEM_CONFIG_CPUCLK_MASK 0x1
-#define SYSTEM_CONFIG_CPUCLK_320 0x0
-#define SYSTEM_CONFIG_CPUCLK_384 0x1
-#define SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT 2
-#define SYSTEM_CONFIG_SRAM_CS0_MODE_MASK 0x3
-#define SYSTEM_CONFIG_SRAM_CS0_MODE_NORMAL 0
-#define SYSTEM_CONFIG_SRAM_CS0_MODE_WDT 1
-#define SYSTEM_CONFIG_SRAM_CS0_MODE_BTCOEX 2
+#define RT305X_SYSCFG_CPUCLK_SHIFT 18
+#define RT305X_SYSCFG_CPUCLK_MASK 0x1
+#define RT305X_SYSCFG_CPUCLK_LOW 0x0
+#define RT305X_SYSCFG_CPUCLK_HIGH 0x1
+#define RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT 2
+#define RT305X_SYSCFG_SRAM_CS0_MODE_MASK 0x3
+#define RT305X_SYSCFG_SRAM_CS0_MODE_NORMAL 0
+#define RT305X_SYSCFG_SRAM_CS0_MODE_WDT 1
+#define RT305X_SYSCFG_SRAM_CS0_MODE_BTCOEX 2
#define RT305X_GPIO_MODE_I2C BIT(0)
#define RT305X_GPIO_MODE_SPI BIT(1)
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
index dff3738..522bb44 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
@@ -33,13 +33,13 @@ void __init rt305x_clocks_init(void)
u32 t;
t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
- t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
+ t = ((t >> RT305X_SYSCFG_CPUCLK_SHIFT) & RT305X_SYSCFG_CPUCLK_MASK);
switch (t) {
- case SYSTEM_CONFIG_CPUCLK_320:
+ case RT305X_SYSCFG_CPUCLK_LOW:
rt305x_cpu_clk.rate = 320000000;
break;
- case SYSTEM_CONFIG_CPUCLK_384:
+ case RT305X_SYSCFG_CPUCLK_HIGH:
rt305x_cpu_clk.rate = 384000000;
break;
}
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c
index a162515..60e5711 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c
@@ -229,8 +229,8 @@ void __init rt305x_register_wdt(void)
/* enable WDT reset output on pin SRAM_CS_N */
t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
- t |= SYSTEM_CONFIG_SRAM_CS0_MODE_WDT <<
- SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT;
+ t |= RT305X_SYSCFG_SRAM_CS0_MODE_WDT <<
+ RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT;
rt305x_sysc_wr(t, SYSC_REG_SYSTEM_CONFIG);
platform_device_register(&rt305x_wdt_device);
--
1.7.2.1
>From 6d88671016bc5d8381d244443e11432893d079a4 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <[email protected]>
Date: Wed, 22 Feb 2012 14:12:51 +0100
Subject: [PATCH 6/6] ramips: rt305x: fix CPU clock detection on RT3352
---
.../mips/include/asm/mach-ralink/rt305x_regs.h | 5 ++
.../ramips/files/arch/mips/ralink/rt305x/clock.c | 43 ++++++++++++++-----
2 files changed, 36 insertions(+), 12 deletions(-)
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
index 1ba5535..b0414d6 100644
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
@@ -71,6 +71,11 @@
#define RT305X_SYSCFG_SRAM_CS0_MODE_WDT 1
#define RT305X_SYSCFG_SRAM_CS0_MODE_BTCOEX 2
+#define RT3352_SYSCFG0_CPUCLK_SHIFT 8
+#define RT3352_SYSCFG0_CPUCLK_MASK 0x1
+#define RT3352_SYSCFG0_CPUCLK_LOW 0x0
+#define RT3352_SYSCFG0_CPUCLK_HIGH 0x1
+
#define RT305X_GPIO_MODE_I2C BIT(0)
#define RT305X_GPIO_MODE_SPI BIT(1)
#define RT305X_GPIO_MODE_UART0_SHIFT 2
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
index 522bb44..4a99cf3 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
@@ -33,20 +33,39 @@ void __init rt305x_clocks_init(void)
u32 t;
t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
- t = ((t >> RT305X_SYSCFG_CPUCLK_SHIFT) & RT305X_SYSCFG_CPUCLK_MASK);
-
- switch (t) {
- case RT305X_SYSCFG_CPUCLK_LOW:
- rt305x_cpu_clk.rate = 320000000;
- break;
- case RT305X_SYSCFG_CPUCLK_HIGH:
- rt305x_cpu_clk.rate = 384000000;
- break;
+
+ if (soc_is_rt305x() || soc_is_rt3350()) {
+ t = (t >> RT305X_SYSCFG_CPUCLK_SHIFT) &
+ RT305X_SYSCFG_CPUCLK_MASK;
+ switch (t) {
+ case RT305X_SYSCFG_CPUCLK_LOW:
+ rt305x_cpu_clk.rate = 320000000;
+ break;
+ case RT305X_SYSCFG_CPUCLK_HIGH:
+ rt305x_cpu_clk.rate = 384000000;
+ break;
+ }
+ rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 3;
+ rt305x_uart_clk.rate = rt305x_sys_clk.rate;
+ rt305x_wdt_clk.rate = rt305x_sys_clk.rate;
+ } else if (soc_is_rt3352()) {
+ t = (t >> RT3352_SYSCFG0_CPUCLK_SHIFT) &
+ RT3352_SYSCFG0_CPUCLK_MASK;
+ switch (t) {
+ case RT3352_SYSCFG0_CPUCLK_LOW:
+ rt305x_cpu_clk.rate = 384000000;
+ break;
+ case RT3352_SYSCFG0_CPUCLK_HIGH:
+ rt305x_cpu_clk.rate = 400000000;
+ break;
+ }
+ rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 3;
+ rt305x_uart_clk.rate = rt305x_sys_clk.rate / 10;
+ rt305x_wdt_clk.rate = rt305x_sys_clk.rate;
+ } else {
+ BUG();
}
- rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 3;
- rt305x_uart_clk.rate = rt305x_sys_clk.rate;
- rt305x_wdt_clk.rate = rt305x_sys_clk.rate;
}
/*
--
1.7.2.1
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