On 2013-05-03 4:17 PM, José Vázquez Fernández wrote: > As have been done preciously in the ramips target the Lantiq target > could be divided in subtargets based in the SoC (ase, danube, svip, ar9, > vr9, ...) or the mips core (4k, 24k, 34k, ...), but the second option > might be very confusing. > The benefits will be the same as in ramips: better organization based in > SoC instead of board, and the specific optimizations for each mips core > might be easily managed, like dsp extensions, multithreading and some > others. > The idea is split the subtargets in this way: > - XWAY Danube. > - XWAY AR9. > - XWAY VR9. > - ASE or XWAY ASE. > - Falcon. > - SVIP-le. > - SVIP-be. Simply making a somewhat arbitrary split of SoC types into subtargets the way you're describing is a bad idea - it wastes lots of extra CPU cycles for building all images. As for ramips: at least rt28xx and rt30xx support cannot coexist in the same kernel image due to memory layout changes - not sure about rt3883, but there's probably a good reason for that one too. You're not giving any proper justification for your proposed subtarget split (which is overkill anyway).
- Felix _______________________________________________ openwrt-devel mailing list [email protected] https://lists.openwrt.org/mailman/listinfo/openwrt-devel
