On 03/05/13 16:56, Felix Fietkau wrote:
On 2013-05-03 4:17 PM, José Vázquez Fernández wrote:
As have been done preciously in the ramips target the Lantiq target
could be divided in subtargets based in the SoC (ase, danube, svip, ar9,
vr9, ...) or the mips core (4k, 24k, 34k, ...), but the second option
might be very confusing.
The benefits will be the same as in ramips: better organization based in
SoC instead of board, and the specific optimizations for each mips core
might be easily managed, like dsp extensions, multithreading and some
others.
The idea is split the subtargets in this way:
- XWAY Danube.
- XWAY AR9.
- XWAY VR9.
- ASE or XWAY ASE.
- Falcon.
- SVIP-le.
- SVIP-be.
Simply making a somewhat arbitrary split of SoC types into subtargets
the way you're describing is a bad idea - it wastes lots of extra CPU
cycles for building all images.
As for ramips: at least rt28xx and rt30xx support cannot coexist in the
same kernel image due to memory layout changes - not sure about rt3883,
rt3883 has pci
but there's probably a good reason for that one too.
You're not giving any proper justification for your proposed subtarget
split (which is overkill anyway).
- Felix
i agree with felix, we used to have per soc subtargets and dropped them
as there is no point in splitting things.
ase needs a seperate subtarget as it has no pci, falcon / svip need
their own subtarget, as they are are SoC variants of their own with
different pinctrl and so forth.
however for xway i see no reason to split up the support to a soc based
approach.
what we should add is a xway-vsmp subtarget for the 74k based SoC
(xrx200) on boards where the vpe0 is not used for voice.
John
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