use loops_per_jiffy, spi clock speed and write bytes to get the spi loop count. if loop to 0 than spi operation timeout. remove usleep. we only write max up to 9 bytes to spi device. use busy loop would be better.
Signed-off-by: Michael Lee <[email protected]> --- ...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 32 +++++++++++----------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch index a412cf4..3304ac5 100644 --- a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch +++ b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch @@ -149,6 +149,7 @@ + void __iomem *base; + unsigned int sys_freq; + unsigned int speed; ++ u16 wait_loops; + struct clk *clk; + spinlock_t lock; + @@ -216,6 +217,11 @@ + reg = mt7621_spi_read(rs, MT7621_SPI_MASTER); + reg &= ~(0xfff << 16); + reg |= (rate - 2) << 16; ++ ++ /* some tolerance. double and add 100 */ ++ rs->wait_loops = (8 * HZ * loops_per_jiffy) / ++ (clk_get_rate(rs->clk) / rate); ++ rs->wait_loops = (rs->wait_loops << 1) + 100; + rs->speed = speed; + + reg &= ~SPIMASTER_LSB; @@ -241,21 +247,15 @@ + return 0; +} + -+static inline int mt7621_spi_wait_till_ready(struct spi_device *spi) ++static inline int mt7621_spi_wait_ready(struct mt7621_spi *rs, int len) +{ -+ struct mt7621_spi *rs = spidev_to_mt7621_spi(spi); -+ int i; -+ -+ for (i = 0; i < RALINK_SPI_WAIT_MAX_LOOP; i++) { -+ u32 status; ++ int loop = rs->wait_loops * len; + -+ status = mt7621_spi_read(rs, MT7621_SPI_TRANS); -+ if ((status & SPITRANS_BUSY) == 0) { -+ return 0; -+ } ++ while ((mt7621_spi_read(rs, MT7621_SPI_TRANS) & SPITRANS_BUSY) && --loop) + cpu_relax(); -+ udelay(1); -+ } ++ ++ if (loop) ++ return 0; + + return -ETIMEDOUT; +} @@ -273,7 +273,7 @@ + u32 data[9] = { 0 }; + u32 val; + -+ mt7621_spi_wait_till_ready(spi); ++ mt7621_spi_wait_ready(rs, 1); + + list_for_each_entry(t, &m->transfers, transfer_list) { + const u8 *buf = t->tx_buf; @@ -321,7 +321,7 @@ + val |= SPITRANS_START; + mt7621_spi_write(rs, MT7621_SPI_TRANS, val); + -+ mt7621_spi_wait_till_ready(spi); ++ mt7621_spi_wait_ready(rs, 36); + + mt7621_spi_set_cs(spi, 0); + @@ -361,7 +361,7 @@ + u32 data[9] = { 0 }; + u32 val = 0; + -+ mt7621_spi_wait_till_ready(spi); ++ mt7621_spi_wait_ready(rs, 1); + + list_for_each_entry(t, &m->transfers, transfer_list) { + const u8 *buf = t->tx_buf; @@ -406,7 +406,7 @@ + val |= SPITRANS_START; + mt7621_spi_write(rs, MT7621_SPI_TRANS, val); + -+ mt7621_spi_wait_till_ready(spi); ++ mt7621_spi_wait_ready(rs, 36); + + mt7621_spi_set_cs(spi, 0); + -- 2.3.6 _______________________________________________ openwrt-devel mailing list [email protected] https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
