Helllo Robert, we use OSG-3.0 and this time its not the alignment problem, that we had on the Intel EMGD before.
The offset of the ushort array is 300 - so it is already dividable by 4, I also already tested with some other alignment values. With my tests, I verified that the content of the element buffer is valid for both draw calls, and if I have only one of the draw calls, the right triangles are rendered - it only fails, when both glDrawElements are called. I hacked in two lines in the DrawElementsUByte::draw() method for testing. So, this fails with rendering garbage triangles: glDrawElements(GL_TRIANGLES, 300, GL_UNSIGNED_BYTE, 0); glDrawElements(GL_TRIANGLES, 861, GL_UNSIGNED_SHORT, 300); but this: glDrawElements(GL_TRIANGLES, 300, GL_UNSIGNED_BYTE, 0); //glDrawElements(GL_TRIANGLES, 861, GL_UNSIGNED_SHORT, 300); or this: //glDrawElements(GL_TRIANGLES, 300, GL_UNSIGNED_BYTE, 0); glDrawElements(GL_TRIANGLES, 861, GL_UNSIGNED_SHORT, 300); works well and draws the right triangles of either the indices 0-299 or 300-1160. (Nothing else in the program is changed, so buffer contents is the same for all three test cases.) When each glDrawElements() is doing right, calling both glDrawElements() in direct sequence would be expected to do also right and to show the "sum" of each render calls, which it is not doing. So, in the meantime I will kick out the Intel graphics and go for a new Nvidia card ... --Alex robertosfield wrote: > Hi Alex, > > Which version of the OSG are you using? Just prior to the OSG-3.0 > release I checked in code that aligned arrays within a buffer object > to 4 byte boundaries, this was done to address problems in Intel > drivers. > > Robert. > > On Wed, Sep 14, 2011 at 1:35 PM, Alexander Irion <> wrote: > > > Hello, > > > > I have a quiet weird problem with Intel Core i5 integrated graphics under > > Ubuntu: > > > > When I have an element buffer object, that consists of an byte index array, > > followed by an ushort index array, wrong triangles will be rendered. (See > > wrong_rendering.png, compared to right_rendering.png). > > > > The attached osgt model file consists of two GL_TRIANGLES draw calls, that > > use the same buffer object for indices. > > > > DrawElementsUByte::draw size:300 offset: 0 > > DrawElementsUShort::draw size:861 offset: 300 > > > > I modified the code to draw only once of them - either the ubyte array or > > the ushort array and in both cases the right triangles are rendered, > > whereas rendering fails, when both draw calls are made. > > > > It looks like the driver interprets the ushort indices as byte indices, > > that would explain the fan looking triangles, that are drawn. The high byte > > (0) of an ushort index would then often be taken as vertex 0 for one of the > > three triangle vertices, so their would be many wrong triangles starting > > from vertex 0 to some other vertices - exactly, as it looks in the attached > > screen shot of the wrong rendering. > > > > The same model looks good on a system with Nvidia graphics, it also works > > on the Intel GPU, when the arrays reside in different buffer objects, or > > when element buffer objects are not used for the vertex indices. > > > > From the application side, everything looks good inside osg, so I think > > this is a driver bug. > > > > Does anyone who also has integrated Intel grahics under linux can confirm > > this bug? > > (To verify, just start the osgviewerapp with the attached model file). > > > > Would that samething for the Mesa guys to look at? > > > > Regards, > > --Alex > > > > > > My spec: > > > > Ubuntu 11.04 > > > > OpenGL vendor string: Tungsten Graphics, Inc > > OpenGL renderer string: Mesa DRI Intel(R) Ironlake Desktop GEM 20100330 > > DEVELOPMENT x86/MMX/SSE2 > > OpenGL version string: 2.1 Mesa 7.10.2 > > OpenGL shading language version string: 1.20 > > > > VGA compatible controller: > > product: Core Processor Integrated Graphics Controller > > vendor: Intel Corporation > > physical id: 2 > > bus info: pci@0000:00:02.0 > > version: 02 > > width: 64 bits > > clock: 33MHz > > capabilities: msi pm vga_controller bus_master cap_list rom > > configuration: driver=i915 latency=0 > > resources: irq:42 memory:f0000000-f03fffff > > memory:e0000000-efffffff ioport:1170(size=8) > > > > CPU: > > product: Intel(R) Core(TM) i5 CPU 660 @ 3.33GHz > > vendor: Intel Corp. > > physical id: 5 > > bus info: cpu@0 > > version: 6.5.5 > > serial: 0002-0655-0000-0000-0000-0000 > > slot: XU1 PROCESSOR > > size: 1199MHz > > capacity: 1199MHz > > width: 64 bits > > clock: 133MHz > > capabilities: x86-64 boot fpu fpu_exception wp vme de pse tsc msr > > pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr > > sse sse2 ss ht tm pbe nx rdtscp constant_tsc arch_perfmon pebs bts > > xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx > > smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt aes lahf_lm ida arat > > tpr_shadow vnmi flexpriority ept vpid cpufreq > > configuration: cores=2 enabledcores=2 id=1 threads=4 > > > > ------------------ > > Read this topic online here: > > http://forum.openscenegraph.org/viewtopic.php?p=42748#42748 > > > > > > > > > > Attachments: > > http://forum.openscenegraph.org//files/optosgt_211.gz > > http://forum.openscenegraph.org//files/right_rendering_125.png > > http://forum.openscenegraph.org//files/wrong_rendering_148.png > > > > > > _______________________________________________ > > osg-users mailing list > > > > http://lists.openscenegraph.org/listinfo.cgi/osg-users-openscenegraph.org > > > > > _______________________________________________ > osg-users mailing list > > http://lists.openscenegraph.org/listinfo.cgi/osg-users-openscenegraph.org > > ------------------ > Post generated by Mail2Forum ------------------ Read this topic online here: http://forum.openscenegraph.org/viewtopic.php?p=42754#42754 _______________________________________________ osg-users mailing list [email protected] http://lists.openscenegraph.org/listinfo.cgi/osg-users-openscenegraph.org
