> [email protected]] On Behalf Of Joel Wiramu Pauling > Sent: Thursday, November 01, 2018 10:29 PM > > Currently - doing slow-path through commodity x86 silicon you are pretty > much capped at 40gbit; so beyond a few use cases where you are say > writting to an NVME array directly within minimal CPU interaction 100G to > nodes is relatively limited. I've read several relatively good analysis which > indicate that we are close to physical limits when we hit around 130Gbit with > Ethernet ; but currently 40Gbit through existing x86_64 architectures is about > spot on. > Hi Joel,
Thank you very much for the info, I assume this limit is per physical NIC is that the case please? (I'm wondering if I'd get a ~100Gbps worth of throughput (100G in + 100G out) through the system as a whole -i.e. multiple interfaces, essentially turning it into an OVS-router. Would you please share what is the limiting factor? (just found that PCIe 3.0 x16 should be capped at 126.075Gbps usable BW; DDR3-2133 @ ~136.5Gbps and Intel® Xeon® Processor E5 Family it's 372.8 Gbps) Thakn you very much adam netconsultings.com ::carrier-class solutions for the telecommunications industry:: _______________________________________________ discuss mailing list [email protected] https://mail.openvswitch.org/mailman/listinfo/ovs-discuss
