Hi fellow OWFS users/developers, Based on my experience developing a microcontroller-based 1-Wire slave I believe that, unless your chosen microcontroller has a lot of power (or you are very good at programming, or write the 1-Wire slave code in assembly), the stringent 1-Wire protocol and strict timing puts a lot of demands on the microcontroller.
For instance, what I am seeing is that every now and then a 1-Wire read will result in invalid data, and not because a few bits become corrupted because of electrical conditions of the 1-Wire bus, but because the microcontroller was busy doing other things when the 1-Wire master performed the 1-Wire bus operation. A good example of this is when the microcontroller needs to read data from an on-board sensor: if you have an on-board DS18B20, the microcontroller needs to disable all interrupts while reading from the DS18B20. If the 1-Wire master tries to read from the microcontroller-based 1-Wire slave when the microcontroller has interrupts disabled to talk to the DS18B20 then the 1-Wire master will receive bad data (probably all ones), or it will not see the slave responding to the 1-Wire reset pulse. I'd like to get input on the best way to handle this. I can see two options: 1. Make sure that the microcontroller *never* ever misses a communication attempt from the 1-Wire bus master. This depends on how things are implemented on the microcontroller. For example, if interrupts are used to handle the 1-Wire bus then care must be taken to guarantee that interrupts for state changes on the 1-Wire bus are never disabled, even if other interrupts (timers, UART, A/D converters, etc.) must be disabled to perform a time-critical task (like talking to an on-board DS18B20). This is the approach that I have been using and it works, but it is disruptive to tasks that are very time-sensitive. 2. Whenever data is transmitted to/from the microcontroller-based sensor, also send a CRC of the transmitted data. OWFS already has the capability to handle CRCs (there are bus transaction types that handle CRCs) so this looks like a good possibility. Obviously, this would require extra processing on both the OWFS side and on the microcontroller side, but then the microcontroller does not have to be too strict when it comes to disabling interrupts since if a 1-Wire communication request comes while interrupts are disabled, the data transmitted will have a bad CRC and the operation can be retried. I have not attempted to implement this option but I am tempted to. I know there are people here that have implemented their own microcontroller-based 1-Wire devices, which is why I thought I'd ask here for thoughts on the matter. This also has implications for OWFS code since if option (2) is chosen then OWFS would need to either generate a CRC (when sending data to the sensor), or check a CRC (when receiving data from the sensor). Thanks in advance for sharing your experiences! Cheers, Eloy Paris.- ------------------------------------------------------------------------------ RSA(R) Conference 2012 Save $700 by Nov 18 Register now http://p.sf.net/sfu/rsa-sfdev2dev1 _______________________________________________ Owfs-developers mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/owfs-developers
