On Thu, 21 Oct 2004 10:14:14, Robert Hildinger writes: >Which of the following scenarios would you find to be faster, based on the >thrashikng or non-thrashing of the icache? ... [examples omitted]
Unfortunately, efficiency of an instruction cache depends on the cache size, associativity, and replacement policy (which differ between the various ARM chips used in PalmOS devices), as well as the code size, locality, and occasionally even the exact address boundaries at which the various code subroutines and segments are installed or loaded into the static or dynamic heaps. Note that in the case of 68k code on a Palm OS 5.x device, your "code" is actually data (loaded in the data cache, not instruction cache) and interpreted by PACE. So coding to prevent icache trashing mostly concerns the development of arm/pno-lets and OS 6 ARM native apps. Lacking advanced software development tools (such as cache simulators or cache/memory performance monitors), perhaps statistical testing (numerous runs on both ARM9 and XScale based products) might help you determine which coding style is usually better. However increasing a subroutine or inner loop in size by just a few words (above, say, a 16k boundary) can sometimes cause a measurable impact on performance. So YMMV. Ron Nicholson HotPaw Productions http://www.hotpaw.com/rhn/palm -- For information on using the Palm Developer Forums, or to unsubscribe, please see http://www.palmos.com/dev/support/forums/
