On Wed, 15 Dec 2004 07:34:37, Jorge Acereda writes:
>How can I sync/invalidate the i-cache and d-cache in OS 5?

On older OS 5 devices which run applications in supervisor
mode, one can use the MCR ARM instruction, although you have
to make sure the code containing this instruction was locked
down long enough in the past for it not to be stale in cache itself
(shortly after reset time, for instance).

Many newer OS 5 devices seem to automatically invalidate
icache and flush dcache on every PaceNativeCall, whether
or not this is needed (on subsequent calls to locked armlets,
for instance), which can be a performance problem.


Ron Nicholson
HotPaw Productions
  <http://www.hotpaw.com/rhn/hotpaw >   

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