Hi Eric,

Here we go.
Is that the correct one?

On Sat, Dec 5, 2009 at 17:34, Eric Blossom <e...@comsec.com> wrote:
> On Thu, Dec 03, 2009 at 12:09:02AM +0300, Alexander Chemeris wrote:
>> Hi all,
>>
>> Anyone to apply this one-liner?
>
> Alexander,
>
> The hard-coded magic numbers below the assert need to be corrected to
> to be a function of the clock rate.  You're not seeing the problem
> because of the daughterboard you're using, but if you're using a Basic
> Tx, they come into play.
>
> The existing magic numbers are particular percentages of 128e6.
> The replacements, f(clock_rate), should be the same percentages.
> They control when and which "coarse modulator" is used in the AD9862.
>
> Can you please submit a slightly bigger patch?
>
> I apologize for not writing earlier about what the problem was.
>
> Thanks,
> Eric
>
>
>> On Tue, Nov 3, 2009 at 01:01, Alexander Chemeris
>> <alexander.cheme...@gmail.com> wrote:
>> > Hi all,
>> >
>> > This assert is not valid, because you may use re-clocked USRP.
>> > And we indeed do ;)
>> >
>> > Patch to remove it is in attachment.
>> >
>> > --
>> > Regards,
>> > Alexander Chemeris.
>



-- 
Regards,
Alexander Chemeris.
diff --git a/usrp/host/lib/usrp_standard.cc b/usrp/host/lib/usrp_standard.cc
index 541dd3f..5c09baa 100644
--- a/usrp/host/lib/usrp_standard.cc
+++ b/usrp/host/lib/usrp_standard.cc
@@ -1025,29 +1025,33 @@ usrp_standard_tx::set_tx_freq (int channel, double freq)
   coarse_mod_t	cm;
   double	coarse;
 
-  assert (dac_rate () == 128000000);
+  double coarse_freq_1 = dac_rate () / 8; // First coarse frequency
+  double coarse_freq_2 = dac_rate () / 4; // Second coarse frequency
+  double coarse_limit_1 = coarse_freq_1 / 2; // Midpoint of [0 , freq1] range
+  double coarse_limit_2 = (coarse_freq_1 + coarse_freq_2) / 2; // Midpoint of [freq1 , freq2] range
+  double high_limit = 44e6/64e6*dac_rate (); // Highest meaningful frequency
 
-  if (freq < -44e6)		// too low
+  if (freq < -high_limit)		// too low
     return false;
-  else if (freq < -24e6){	// [-44, -24)
+  else if (freq < -coarse_limit_2){	// For 64MHz: [-44, -24)
     cm = CM_NEG_FDAC_OVER_4;
-    coarse = -dac_rate () / 4;
+    coarse = -coarse_freq_2;
   }
-  else if (freq < -8e6){	// [-24, -8)
+  else if (freq < -coarse_limit_1){	// For 64MHz: [-24, -8)
     cm = CM_NEG_FDAC_OVER_8;
-    coarse = -dac_rate () / 8;
+    coarse = -coarse_freq_1;
   }
-  else if (freq < 8e6){		// [-8, 8)
+  else if (freq < coarse_limit_1){		// For 64MHz: [-8, 8)
     cm = CM_OFF;
     coarse = 0;
   }
-  else if (freq < 24e6){	// [8, 24)
+  else if (freq < coarse_limit_2){	// For 64MHz: [8, 24)
     cm = CM_POS_FDAC_OVER_8;
-    coarse = dac_rate () / 8;
+    coarse = coarse_freq_1;
   }
-  else if (freq <= 44e6){	// [24, 44]
+  else if (freq <= high_limit){	// For 64MHz: [24, 44]
     cm = CM_POS_FDAC_OVER_4;
-    coarse = dac_rate () / 4;
+    coarse = coarse_freq_2;
   }
   else				// too high
     return false;
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