Building PCRE with JIT support on a Solaris x86-64 system with the vendor
compiler gave me
"/path/to/pcre-r1213/sljit/sljitNativeX86_common.c", line 325: #error:
"SLJIT_DETECT_SSE2 is not implemented for this C compiler"
cc: acomp failed for /path/to/pcre-r1213/pcre_jit_compile.c
In fixing that, I also noticed a number of indented cpp directives in the
source, e.g.
#else
#error This is an error message
#endif
Officially, ANSI C supports this, but I've run into older (yet
ANSI-capable) compilers that choke on the whitespace before the "#" mark.
This goes for "gcc -traditional", too.
My patch, in addition to fixing the aforementioned Solaris build issue,
changes these directives to the more compatible form
#else
# error This is an error message
#endif
which is already used elsewhere in the PCRE source.
--Daniel
--
Daniel Richard G. || [email protected] || Software Developer
Teragram Linguistic Technologies (a division of SAS)
http://www.teragram.com/Index: pcre_internal.h
===================================================================
--- pcre_internal.h (revision 1214)
+++ pcre_internal.h (working copy)
@@ -200,7 +200,7 @@
typedef unsigned int pcre_uint16;
typedef int pcre_int16;
#else
- #error Cannot determine a type for 16-bit unsigned integers
+# error Cannot determine a type for 16-bit unsigned integers
#endif
#if UINT_MAX == 4294967295
@@ -210,7 +210,7 @@
typedef unsigned long int pcre_uint32;
typedef long int pcre_int32;
#else
- #error Cannot determine a type for 32-bit unsigned integers
+# error Cannot determine a type for 32-bit unsigned integers
#endif
/* When checking for integer overflow in pcre_compile(), we need to handle
Index: pcregrep.c
===================================================================
--- pcregrep.c (revision 1214)
+++ pcregrep.c (working copy)
@@ -1575,8 +1575,8 @@
#ifdef JFRIEDL_DEBUG
if (jfriedl_XT || jfriedl_XR)
{
- #include <sys/time.h>
- #include <time.h>
+# include <sys/time.h>
+# include <time.h>
struct timeval start_time, end_time;
struct timezone dummy;
int i;
Index: sljit/sljitNativeX86_common.c
===================================================================
--- sljit/sljitNativeX86_common.c (revision 1214)
+++ sljit/sljitNativeX86_common.c (working copy)
@@ -277,7 +277,7 @@
#if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32)
-#ifdef __GNUC__
+#if defined(__GNUC__) || defined(__SUNPRO_C)
/* AT&T syntax. */
asm (
"pushl %%ebx\n"
@@ -299,12 +299,12 @@
mov features, edx
}
#else
- #error "SLJIT_DETECT_SSE2 is not implemented for this C compiler"
+# error "SLJIT_DETECT_SSE2 is not implemented for this C compiler"
#endif
#else /* SLJIT_CONFIG_X86_32 */
-#ifdef __GNUC__
+#if defined(__GNUC__) || defined(__SUNPRO_C)
/* AT&T syntax. */
asm (
"pushq %%rbx\n"
@@ -322,7 +322,7 @@
__cpuid(CPUInfo, 1);
features = (sljit_ui)CPUInfo[3];
#else
- #error "SLJIT_DETECT_SSE2 is not implemented for this C compiler"
+# error "SLJIT_DETECT_SSE2 is not implemented for this C compiler"
#endif
#endif /* SLJIT_CONFIG_X86_32 */
@@ -1259,7 +1259,7 @@
sljit_si dst_is_ereg = 0;
sljit_si src_is_ereg = 0;
#else
- #define src_is_ereg 0
+# define src_is_ereg 0
#endif
CHECK_ERROR();
@@ -1413,7 +1413,7 @@
return SLJIT_SUCCESS;
#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
- #undef src_is_ereg
+# undef src_is_ereg
#endif
}
Index: sljit/sljitLir.c
===================================================================
--- sljit/sljitLir.c (revision 1214)
+++ sljit/sljitLir.c (working copy)
@@ -108,87 +108,87 @@
/* SLJIT_REWRITABLE_JUMP is 0x1000. */
#if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32) || (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
- #define PATCH_MB 0x4
- #define PATCH_MW 0x8
+# define PATCH_MB 0x4
+# define PATCH_MW 0x8
#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
- #define PATCH_MD 0x10
+# define PATCH_MD 0x10
#endif
#endif
#if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) || (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
- #define IS_BL 0x4
- #define PATCH_B 0x8
+# define IS_BL 0x4
+# define PATCH_B 0x8
#endif
#if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
- #define CPOOL_SIZE 512
+# define CPOOL_SIZE 512
#endif
#if (defined SLJIT_CONFIG_ARM_THUMB2 && SLJIT_CONFIG_ARM_THUMB2)
- #define IS_COND 0x04
- #define IS_BL 0x08
+# define IS_COND 0x04
+# define IS_BL 0x08
/* cannot be encoded as branch */
- #define B_TYPE0 0x00
+# define B_TYPE0 0x00
/* conditional + imm8 */
- #define B_TYPE1 0x10
+# define B_TYPE1 0x10
/* conditional + imm20 */
- #define B_TYPE2 0x20
+# define B_TYPE2 0x20
/* IT + imm24 */
- #define B_TYPE3 0x30
+# define B_TYPE3 0x30
/* imm11 */
- #define B_TYPE4 0x40
+# define B_TYPE4 0x40
/* imm24 */
- #define B_TYPE5 0x50
+# define B_TYPE5 0x50
/* BL + imm24 */
- #define BL_TYPE6 0x60
+# define BL_TYPE6 0x60
/* 0xf00 cc code for branches */
#endif
#if (defined SLJIT_CONFIG_PPC_32 && SLJIT_CONFIG_PPC_32) || (defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64)
- #define UNCOND_B 0x04
- #define PATCH_B 0x08
- #define ABSOLUTE_B 0x10
+# define UNCOND_B 0x04
+# define PATCH_B 0x08
+# define ABSOLUTE_B 0x10
#endif
#if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
- #define IS_MOVABLE 0x04
- #define IS_JAL 0x08
- #define IS_BIT26_COND 0x10
- #define IS_BIT16_COND 0x20
+# define IS_MOVABLE 0x04
+# define IS_JAL 0x08
+# define IS_BIT26_COND 0x10
+# define IS_BIT16_COND 0x20
- #define IS_COND (IS_BIT26_COND | IS_BIT16_COND)
+# define IS_COND (IS_BIT26_COND | IS_BIT16_COND)
- #define PATCH_B 0x40
- #define PATCH_J 0x80
+# define PATCH_B 0x40
+# define PATCH_J 0x80
/* instruction types */
- #define MOVABLE_INS 0
+# define MOVABLE_INS 0
/* 1 - 31 last destination register */
/* no destination (i.e: store) */
- #define UNMOVABLE_INS 32
+# define UNMOVABLE_INS 32
/* FPU status register */
- #define FCSR_FCC 33
+# define FCSR_FCC 33
#endif
#if (defined SLJIT_CONFIG_SPARC_32 && SLJIT_CONFIG_SPARC_32)
- #define IS_MOVABLE 0x04
- #define IS_COND 0x08
- #define IS_CALL 0x10
+# define IS_MOVABLE 0x04
+# define IS_COND 0x08
+# define IS_CALL 0x10
- #define PATCH_B 0x20
- #define PATCH_CALL 0x40
+# define PATCH_B 0x20
+# define PATCH_CALL 0x40
/* instruction types */
- #define MOVABLE_INS 0
+# define MOVABLE_INS 0
/* 1 - 31 last destination register */
/* no destination (i.e: store) */
- #define UNMOVABLE_INS 32
+# define UNMOVABLE_INS 32
- #define DST_INS_MASK 0xff
+# define DST_INS_MASK 0xff
/* ICC_SET is the same as SET_FLAGS. */
- #define ICC_IS_SET (1 << 23)
- #define FCC_IS_SET (1 << 24)
+# define ICC_IS_SET (1 << 23)
+# define FCC_IS_SET (1 << 24)
#endif
#if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32)
@@ -661,12 +661,12 @@
#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64) || (defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64)
#ifdef _WIN64
- #define SLJIT_PRINT_D "I64"
+# define SLJIT_PRINT_D "I64"
#else
- #define SLJIT_PRINT_D "l"
+# define SLJIT_PRINT_D "l"
#endif
#else
- #define SLJIT_PRINT_D ""
+# define SLJIT_PRINT_D ""
#endif
#define sljit_verbose_param(p, i) \
@@ -1318,23 +1318,23 @@
#define SLJIT_CPUINFO SLJIT_CPUINFO_PART1 SLJIT_CPUINFO_PART2 SLJIT_CPUINFO_PART3
#if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32)
- #include "sljitNativeX86_common.c"
+# include "sljitNativeX86_common.c"
#elif (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
- #include "sljitNativeX86_common.c"
+# include "sljitNativeX86_common.c"
#elif (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
- #include "sljitNativeARM_v5.c"
+# include "sljitNativeARM_v5.c"
#elif (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
- #include "sljitNativeARM_v5.c"
+# include "sljitNativeARM_v5.c"
#elif (defined SLJIT_CONFIG_ARM_THUMB2 && SLJIT_CONFIG_ARM_THUMB2)
- #include "sljitNativeARM_Thumb2.c"
+# include "sljitNativeARM_Thumb2.c"
#elif (defined SLJIT_CONFIG_PPC_32 && SLJIT_CONFIG_PPC_32)
- #include "sljitNativePPC_common.c"
+# include "sljitNativePPC_common.c"
#elif (defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64)
- #include "sljitNativePPC_common.c"
+# include "sljitNativePPC_common.c"
#elif (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
- #include "sljitNativeMIPS_common.c"
+# include "sljitNativeMIPS_common.c"
#elif (defined SLJIT_CONFIG_SPARC_32 && SLJIT_CONFIG_SPARC_32)
- #include "sljitNativeSPARC_common.c"
+# include "sljitNativeSPARC_common.c"
#endif
#if !(defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
Index: sljit/sljitNativeMIPS_common.c
===================================================================
--- sljit/sljitNativeMIPS_common.c (revision 1214)
+++ sljit/sljitNativeMIPS_common.c (working copy)
@@ -964,7 +964,7 @@
sljit_si src, sljit_sw srcw)
{
#if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
- #define flags 0
+# define flags 0
#endif
CHECK_ERROR();
@@ -1029,7 +1029,7 @@
return SLJIT_SUCCESS;
#if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
- #undef flags
+# undef flags
#endif
}
@@ -1039,7 +1039,7 @@
sljit_si src2, sljit_sw src2w)
{
#if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
- #define flags 0
+# define flags 0
#endif
CHECK_ERROR();
@@ -1079,7 +1079,7 @@
return SLJIT_SUCCESS;
#if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
- #undef flags
+# undef flags
#endif
}
--
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