1. Design three seperate PCB's, each with their own seperate Schematic and PCB
Layout. Do all of your DRC, etc., at the individual PCB Design Level
2. Create a combined PCB to suit the way you want to gather the 3 PCB's together,
starting with a copy of your largest PCB database (do not forget to rename it), and
then with that database opened, open the other two databases and copy everything
into the first database. You must make sure that all "Layers" are on in all of the
sepreate databases, since you cannot "Select" anything to copy it that is on a
"Layer" that is turned off.
Arrange everything the way that you want it, with the three PCB's individually
placed where you want them, making sure that you account for the manner that you are
going to seperate these boards ("shear", "route", or "score").
You can either use a straight "copy", or you can use "copy array", and either way
keep all of your net names and reference designators.
There is absolutely no way you will be able to make Protel happy by doing this,
since no matter what you do, the DRC of the "Combined PCB's" will explode and scream
bloody murder, so just ignore it.
That is why I say do your DRC back at the individual PCB level, where it will have
meaning.
Respecting the combined PCB, you may want to do a DRC and just ignore the warnings
and errors regarding the duplicate nets or any unconnected nets (which you will have
if their are any duplicate nets), and any duplicate Reference Designators, and the
related netlist problems that this may cause in the way of errors, and concentrate
only on the things relating to the "panelization" of your new PCB.
Actually, the best thing to do here is to keep your wits about you as you locate the
three PCB'c as they relate to each other and then DO NOT run a DRC, or just run the
drc and delete the resultant file without even opening it and reading it.
This problem is no different than that which occurs when you attempt to do your own
"panelization" of a single PCB, where Protel's DRC also Explodes and goes south for
the winter.
You will never want to make any changes to the individual PCB's at the "Combined
PCB" level, since you can may have problems with not only net names and reference
designators, but different packages and footprints. As individual Designs, each
schematic and PCB Layout can have different symbols and different Component
Footprints, which will all get copied in their respective locations into the
"Combined PCB", and so long as you ignore the DRC there will be no consequences of
these differences, but if you try to edit things at the "Combined PCB" level, you
may encounter problems.
You also need to account for the possibility of having "planes" on one board and not
on another, which means that you will have to "block out" any planes that you do not
want to appear on any of the individual PCB's. This may lead to an unbalanced
construction withrespect to "copper balance" on individual layers, and this may
cause more problems than it is worth, in that the board house will have more trouble
with this construction, and as a result may charge you more.
The real question here is will you actually end up saving any money when making the
"Combined PCB". You may, and then again you may not. Just remember that the Board
House is going to be able to see that it is a combined board just by looking at, and
may even quote you a higher price for the whole thing anyway.
If you are going to save money in other areas, such as having the three boards
assembled at the same time on the same "panel", then by all means do it.
The primary thing here is to not let the limitations of Protel dictate how you want
to do things, but rather just learn to accept it's limitations and live with them,
ignoring them when you have to, and use Protel as you have to to do the things that
you want to do.
JaMi
----- Original Message -----
From: "Don" <[EMAIL PROTECTED]>
To: "Protel EDA Discussion List" <[EMAIL PROTECTED]>
Sent: Tuesday, October 26, 2004 2:12 PM
Subject: Re: [PEDA] how to merge three PCB to one
The cut & 'paste special' method works well with 2 layers but seemed to
stumble with connectivity on the inner planes on 4 layers. Or did I
just flub something... Otherwise this means much more use of camtastic
as our fab has a great deal on multi-layer if you supply work as a panel
that they don't have to mess with (much).
Cheers
Don
Dennis Saputelli wrote:
> this comes up all the time
>
> we use your method #1 almost every day with no troubles
>
> using this method you also get full DRC checking as well
> whereas if you use the paste special method you do not
>
> don't forget that not only is pcb cost lower but overall
> handling and assembly costs are lower (assuming the boards are used as a
> 'set' which is what we do)
>
> something you have to think about however is how you are going to
> singulate the boards
> as you get into tab routing, mouse bites and other features which may
> not otherwise be needed you start to erode a bit of the benefit
>
> we have been scoring some of these things lately
> before you say it is crummy method please realize that scoring has come
> a long way in the last decade just like the rest of pcb fab tech
>
> they can now do jump (or skip) scoring, hold accuracy to maybe 10 thou
> and other stuff
> for todays NC scoring machines due to FR4 fringing leave 20 thou (mils)
> min between the score line and the edge of an outer trace or Cu
>
> 40 is probably a smarter choice so that is one down side to scoring
>
> nominal score depth s.b. 1/3 T from each side
>
> this varies with how big a piece you have to grab though (leverage)
> narrow breakoffs need to be scored deeper
> very heavy big bds with a score in the middle may be scored less deeply
>
> also there are stresses to consider during the singulation whatever
> method is used
>
> if the board has slots or routing operations anyway then maybe drop a
> few obrounds in the scored areas to reduce the stresses of the
> singulation process
>
> also the edges will not be extacly pristine but may be suitable for many
> purposes and don't have to be cleaned up like the tab & mouse bite routine
>
> Dennis Saputelli
>
> _______________________________________________________________________
> Integrated Controls, Inc. Tel: 415-647-0480 EXT 107
> 2851 21st Street Fax: 415-647-3003
> San Francisco, CA 94110 www.integratedcontrolsinc.com
>
>
> �T� wrote:
>
>> Hello everyone,
>>
>> I have three small PCB and I want to merge them to one PCB in order to
>> decrease the cost. I am thinking about two method as following but
>> either has demerit. Could you please give me some advice?
>>
>> (1) Design the three PCB in one project. But the designator name
>> cannot repeat so I must name the parts of the1st PCB from "U1" to "U5"
>> then the 2nd PCB from U6 to U10 (for example) and so on.
>>
>> (2) Design the three PCB in three projects. But when I output the
>> three gerber data files I cannot merge them into one gerber data file.
>>
>> Thank you for any advice.
>>
>>
>>
>>
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