I believe they added a feature to the new software that allows layer
specific keep outs that do not plot in gerber... I have not verified it, but
I think it's a check box in the properties dialog box.

Just a thought.

Bill Brooks - KG6VVP
PCB Design Engineer , C.I.D.+, C.I.I.
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510
e-mail:[EMAIL PROTECTED]
http://www.dtwc.com
http://pcbwizards.com


-----Original Message-----
From: Jeff Stout [mailto:[EMAIL PROTECTED] 
Sent: Wednesday, December 01, 2004 2:40 PM
To: [EMAIL PROTECTED]
Subject: [PEDA] Keep out

OK I have a DDPAK component and I'm filling the top layer with a polygon.
But I don't want the polygon to fill in under the DDPAK component.

 

If I put a ring around the component on the "keep out" layer, it will mess
up the polygon I have on the bottom layer.  I tried putting a "No Net" ring
around the component which looks stupid.  A top layer "keep out" does the
same thing and also looks stupid.

 

As I see it, I have three options:

 

1) Redesign the DDPAK component so that there is an area of copper under the
entire body.

2) Put the ring around the DDAK component, but then erase the ring after the
polygon is purred.

3) Something very clever I'm not smart enough to invent.

 

Jeff Stout

 



 
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