oops, sorry Matt. Only just noticed you refer to DXP. Don't know about DXP. My 
previous email is relevant to 99se only.

Cheers,
Gareth.


-----Original Message-----
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] Behalf Of Matt Polak
Sent: Friday, 4 March 2005 2:02 PM
To: Protel EDA Discussion List
Subject: [PEDA] DXP: Non-proportional clearance expansion on power
planes?



        Hey guys,

        Got a weird one here. I'm doing a four-layer board (basically finished) 
and I've been tweaking up the power planes and things in the final check. I 
noticed something that seems very odd. In the Rules, I have the default "20 
mils" set for Plane Clearance. Around all of my smaller holes (e.g. 20 mil 
vias), when viewing the power planes, the clearance pullbacks on the power 
planes are just fine. When I look at some larger mounting holes, though, 
such as 120 mil for DB-25 connector stress reliefs, the clearances (though 
still set 20 mils) are hardly even visible! The larger the hole gets, the 
thinner the clearance around it - it's like the clearance is NOT 
proportionally scaling to the hole size!

        If I temporarily change the Plane Clearance rule to, say, 50 mils, all 
of 
the smaller holes get extremely overkill clearances (obviously) but then at 
least a thin line appears around the larger holes.

        I've had multi-layer boards manufactured before (under 99SE) using 
these 
same exact parts and clearance rules, and didn't have a problem with them, 
which is making me wonder if this is a Protel display problem, or if my 
board house caught it and pulled them back more. I'm about to generate a 
set of Gerbers to look at to see if this is a legitimate output problem, or 
just an on-screen display problem.

        Anyone had this one happen before? Suggestions?

Regards,
-- Matt 


 
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