The uncore is a symptom of Intel's failure of imagination in naming
all the stuff on the chip that is outside the cores.

IBM (Alex Mericas, in particular) has taken to calling it the "nest".

Example:  On an AMD chip in the shared L3 cache, the
memory controller, and the HT links originate from shared stuff outside
any one of the cores.  You can have multiple cores looking at the
events from these resources, but they'll all be counting the same events,
more or less.  The "more or less" part is that doing first person measurement,
e.g., with PAPI, each process counts only the events that happen while that
process is actually running.  When counting L3 events, for example, a process
will see its own events as well as those caused by whatever else is running
concurrently.

The difficulty in analyzing this stuff is the reason we've been moving away
from 1st person profiling and towards "system wide" modes.


Dan Terpstra wrote:
> Hmmm...
> An awful lot of events with an x.y.z naming structure. This could cause a
> combinatorial explosion. Also, what the heck's an UnCore?
> - d
> 
> 
>> -----Original Message-----
>> From: stephane eranian [mailto:[EMAIL PROTECTED]
>> Sent: Thursday, November 27, 2008 6:12 AM
>> To: perfmon2-devel
>> Subject: [perfmon2] Intel Core i7 specs available.
>>
>> Hello,
>>
>> Just wanted to point out that the Intel Core i7 (Nehalem) specifications
>> are now available.
>>
>> I will be releasing the perfmon (kernel, libpfm, pfmon) support for
>> Nehalem
>> within the next two weeks.
>>
>> You can get a feel for it at:
>>
>>      http://download.intel.com/design/processor/manuals/253669.pdf
>>
>> Lots of interesting things you can do.
>>
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> 
> 
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-- 
Robert J. Fowler
Chief Domain Scientist, HPC
Renaissance Computing Institute
The University of North Carolina at Chapel Hill
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