On 10.02.10 12:59:26, Peter Zijlstra wrote: > On Mon, 2010-02-08 at 17:17 +0200, Stephane Eranian wrote: > > This patch adds correct AMD Northbridge event scheduling. > > It must be applied on top tip-x86 + hw_perf_enable() fix. > > > > NB events are events measuring L3 cache, Hypertransport > > traffic. They are identified by an event code >= 0xe0. > > They measure events on the Northbride which is shared > > by all cores on a package. NB events are counted on a > > shared set of counters. When a NB event is programmed > > in a counter, the data actually comes from a shared > > counter. Thus, access to those counters needs to be > > synchronized. > > > > We implement the synchronization such that no two cores > > can be measuring NB events using the same counters. Thus, > > we maintain a per-NB * allocation table. The available slot > > is propagated using the event_constraint structure. > > > > The 2nd version takes into account the changes on how > > constraints are stored by the scheduling code. > > > > The 3rd version fixes formatting issues, code readability > > and one bug in amd_put_event_constraints(). > > > > Signed-off-by: Stephane Eranian <eran...@google.com> > > OK, took this with the below merged in.
Peter, will this go to tip/perf/core? Or is there another tree? -Robert -- Advanced Micro Devices, Inc. Operating System Research Center email: robert.rich...@amd.com ------------------------------------------------------------------------------ SOLARIS 10 is the OS for Data Centers - provides features such as DTrace, Predictive Self Healing and Award Winning ZFS. Get Solaris 10 NOW http://p.sf.net/sfu/solaris-dev2dev _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
