Hi, Stephane > The PMU takes some variable amount of time to interrupt after an overflow. > During that time, execution continues.
So the skid has nothing to do with "micro-op"? > This "imprecision" cannot be corrected by software but only thru hardware. > That's why you have Intel PEBS, for instance. You mean PEBS makes the skid disappered? Does `perf` or libpfm4 support this? The example I showed was ran on a x86 machine, it seems `perf` does not use PEBS feature. > In summary, except for cycles you should do not expect profiles to point at > instructions that generated the occurrences of the sampling event. That means we cannot trace back a few instructions and say some instruction generates the event? Take "BRANCH_INSTRUCTIONS_RETIRED" for example, 0.00 : 401d56: eb 12 jmp 401d6a <fallbackSort+0x1aa> 2.23 : 401d58: 83 c0 01 add $0x1,%eax Can I say the jmp before add generate the BRANCH_INSTRUCTIONS_RETIRED event? Thanks! Regards, chenwj -- Wei-Ren Chen (陳韋任) Parallel Processing Lab, Institute of Information Science, Academia Sinica, Taiwan (R.O.C.) Tel:886-2-2788-3799 #1667 ------------------------------------------------------------------------------ Colocation vs. Managed Hosting A question and answer guide to determining the best fit for your organization - today and in the future. http://p.sf.net/sfu/internap-sfd2d _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
