2011/3/22 陳韋任 <che...@iis.sinica.edu.tw>: > Hi, > >> I doubt this is the problem. > > Yeah, I have tried -1 through 2. But none of them works. :/ > >> You need to make sure you have a kernel that supports PEBS. >> To do that, you can check the syslog. dmesg | fgrep PEBS should >> do it. > > $ dmesg | grep "Performance Events" > Performance Events: PEBS fmt0+, Core2 events, Intel PMU driver. > >> libbpfm4 does maintain this information. It won't let you enable >> precise sampling (precise=) if the event does not support PEBS. > > `showevtinfo` list events with field Flags, some events'Flags are > "[precise]". Does this mean those events support PBES? For example, > > #----------------------------- > IDX : 23068780 > PMU name : core (Intel Core) > Name : X87_OPS_RETIRED > Equiv : None > Flags : [precise] > Desc : FXCH instructions retired > Code : 0xc1 > Umask-00 : 0x01 : PMU : [FXCH] : None : FXCH instructions retired > Umask-01 : 0xfe : PMU : [ANY] : [default] [precise] : Retired floating-point > computational operations (Precise Event) > Modif-00 : 0x00 : PMU : [k] : monitor at priv level 0 (boolean) > Modif-01 : 0x01 : PMU : [u] : monitor at priv level 1, 2, 3 (boolean) > Modif-02 : 0x02 : PMU : [e] : edge level (boolean) > Modif-03 : 0x03 : PMU : [i] : invert (boolean) > Modif-04 : 0x04 : PMU : [c] : counter-mask in range [0-255] (integer) > > $ evt2raw -v X87_OPS_RETIRED:FXCH > r5301c1 core::X87_OPS_RETIRED:FXCH:e=0:i=0:c=0:u=1:k=1:precise=0 > $ evt2raw -v X87_OPS_RETIRED:FXCH:precise=1 > r5301c1 core::X87_OPS_RETIRED:FXCH:e=0:i=0:c=0:u=1:k=1:precise=1 > > $ ./perf_examples/evt2raw -v X87_OPS_RETIRED > r53fec1 core::X87_OPS_RETIRED:ANY:e=0:i=0:c=0:u=1:k=1:precise=0 > $ ./perf_examples/evt2raw -v X87_OPS_RETIRED:precise=1 > r53fec1 core::X87_OPS_RETIRED:ANY:e=0:i=0:c=0:u=1:k=1:precise=1 > > Here are some questions, > > 1. From the output of `showevtinfo`, one might think X87_OPS_RETIRED:FXCH > does not allow PBES compared with X87_OPS_RETIRED:ANY. But `evt2raw` > does not reject this kind input. Is this a bug? Or I just > misunderstood what `showevtinfo` output means? > evt2raw does not take into account the precise attribute. That's because it does not impact attr->config but rather attr->precise_ip.
> 2. Assume X87_OPS_RETIRED:ANY allows "precise=0" or "precise=1". But the > raw event code are the same (r53fec1). Is this right? If so, how does > `perf` choose to use PBES or not? > precise=0 -> do not use PEBS precise=1 -> use PEBS but do not try to correct IP+1 skid precise=2 -> use PEBS + LBR to correct IP+1 skid Again PEBS does not impact event code. Use task_smpl to check if this event actually work as PEBS. If so it should capture samples marked with '(exact)' when precise=2. > Thanks! > > Regards, > chenwj > > -- > Wei-Ren Chen (陳韋任) > Parallel Processing Lab, Institute of Information Science, > Academia Sinica, Taiwan (R.O.C.) > Tel:886-2-2788-3799 #1667 > ------------------------------------------------------------------------------ Enable your software for Intel(R) Active Management Technology to meet the growing manageability and security demands of your customers. Businesses are taking advantage of Intel(R) vPro (TM) technology - will your software be a part of the solution? Download the Intel(R) Manageability Checker today! http://p.sf.net/sfu/intel-dev2devmar _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
