Hi Paul

Thx for your answer.

Well, I tried to apply the IBS perf_event_open patches of Robert. But
since these kernel patches are almost an year old, parts of them are not
possible to apply because they are outdated. The strange thing is, that
there's a lot of IBS code in the oprofile driver module. At least I can
see that IBS works with oprofile, but I guess I can't use oprofile for
my purposes.

The current libpfm4 reports only the IBS_OPS_TAGGED ibs event on my AMD
Opteron 6128 machine. No idea what this event means. I guess I need the
IBS_FETCH_* stuff.

libpfm4/examples# ./showevtinfo ibs
.
IDX      : 134217846
PMU name : amd64_fam10h_istanbul (AMD64 Fam10h Istanbul)
Name     : IBS_OPS_TAGGED
Equiv    : None
Flags    : None
Desc     : IBS Ops Tagged
Code     : 0x1cf
Modif-00 : 0x00 : PMU : [k] : monitor at priv level 0 (boolean)
Modif-01 : 0x01 : PMU : [u] : monitor at priv level 1, 2, 3 (boolean)
Modif-02 : 0x02 : PMU : [e] : edge level (boolean)
Modif-03 : 0x03 : PMU : [i] : invert (boolean)
Modif-04 : 0x04 : PMU : [c] : counter-mask in range [0-255] (integer)
Modif-05 : 0x05 : PMU : [h] : monitor in hypervisor (boolean)
Modif-06 : 0x06 : PMU : [g] : measure in guest (boolean)


Well, maybe I have to switch my project to Intel Nehalem architecture
until this IBS stuff is usable/documented with libpfm4/perf_event_open.


-Ivo


Am 06.06.2011 15:57, schrieb Drongowski, Paul:
> Hello Ivo --
>
> Yep, you will need to use the AMD IBS feature. 
>
> Sampling the performance monitoring counters (PMCs) is imprecise.
> When a PMC (overflow) generates an interrupt, the processing pipeline is most
> probably far beyond the actual instruction which caused the PMC (overflow)
> that triggers the sampling interrupt. Thus, it's not possible to capture the
> data operand address for instructions that access memory via PMC sampling.
>
> IBS has this capability. After the IBS hardware selects and tags an
> execution op for sampling, it records the precise IP and events for
> the op. The IP is the address of the parent x86 op. If the op is a load
> or store, the data operand address is captured, too.
>
> Robert is the right guy for software questions. (I'm doing hardware now. :-)
>
> -- pj
>
> Paul Drongowski
> Consultant at AMD
>
> -----Original Message-----
> From: Ivo Steinmann [mailto:isteinm...@bluewin.ch] 
> Sent: Sunday, June 05, 2011 7:44 PM
> To: perfmon2-devel@lists.sourceforge.net
> Subject: [perfmon2] AMD IBS Support
>
> Hello all
>
> I'm really new to all this performance monitoring stuff.
>
> I would like to monitor cache accesses on my amd64 phenom and opteron machine 
> and I also would like to get the address that is accessed. So I tried 
> DATA_CACHE_ACCESSES, REQUESTS_TO_L2, READ_REQUEST_TO_L3_CACHE. 
> It's working so far as the events are raised (using sigaction mechanism).
>
>      attr.wakeup_events = 1;
>      attr.sample_type = PERF_SAMPLE_IP | PERF_SAMPLE_ADDR; //| 
> PERF_SAMPLE_READ | PERF_SAMPLE_PERIOD;
>      attr.sample_period = SMPL_PERIOD;
>      attr.read_format = 0;//PERF_FORMAT_GROUP | PERF_FORMAT_ID | 
> PERF_FORMAT_TOTAL_TIME_ENABLED | PERF_FORMAT_TOTAL_TIME_RUNNING;
>
>
> But somehow the addr is allways zero (nil) :(
>
> I think I have to use the amd64 IBS stuff (I guess then an address is 
> returned). I found this thread: http://lkml.org/lkml/2010/4/13/336 from 
> Robert Richter. There he provides some patches for amd64 ibs support. 
> And here an example for libpfm4: https://lkml.org/lkml/2010/10/18/329
>
> Are this patches obsolete? How can I use IBS with libpfm4?
>
> I'm using this kernel version:
> git://git.kernel.org/pub/scm/linux/kernel/git/rric/oprofile.git
>
> And libpfm4 from:
> git://perfmon2.git.sourceforge.net/gitroot/perfmon2/libpfm4
>
> Thx
> Ivo Steinmann
>
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