Hello I know now and then on this list the matter of deterministic events comes up.
Previously the only known x86 Deterministic event was INST_RETIRED:STORES on Core2 machines. Albert Noll reported to me recently that the BR_INST_RETIRED:CONDITIONAL instruction is determinsitic on SandyBridge. I've verified this result. Also I've found that the same event is deterministic on Nehalem, with some overcount issues. This event counts any instruction which opcode starts with "0x0f". This covers conditional branches, but unfortunately also counts many MMX instructions. Otherwise though it is deterministic. Vince vweav...@eecs.utk.edu ------------------------------------------------------------------------------ Got Input? Slashdot Needs You. Take our quick survey online. Come on, we don't ask for help often. Plus, you'll get a chance to win $100 to spend on ThinkGeek. http://p.sf.net/sfu/slashdot-survey _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel