On Wed, 3 Aug 2011, stephane eranian wrote:
> Vince,
>
> On Fri, Jul 29, 2011 at 9:09 AM, Vince Weaver <vweav...@eecs.utk.edu> wrote:
> > Hello
> >
> > I know now and then on this list the matter of deterministic events comes
> > up.
> >
> How do you define 'deterministic' here?
> Is it: Always get the same answer on a deterministic program (assuming
> user level
> monitoring only)?
Yes, exactly. Getting the same answer run-to-run on a deterministic
benchmark with user-level monitoring.
There are two issues, external variation and overcount. Almost all x86
events (except the three I mention) also count things like hardware
interrupts and page faults too, which give run to run variation.
Overcount is when an event is counted multiple times. So the nehalem
event has overcount on the retired conditional branches (due to MMX
instructions) but is still deterministic. The overcount does make
it hard to predict in advance what the "exact" aggregate count should be.
Vince
> > Previously the only known x86 Deterministic event was
> > INST_RETIRED:STORES
> > on Core2 machines.
> >
> > Albert Noll reported to me recently that the
> > BR_INST_RETIRED:CONDITIONAL
> > instruction is determinsitic on SandyBridge. I've verified this result.
> >
> > Also I've found that the same event is deterministic on Nehalem, with
> > some overcount issues. This event counts any instruction which
> > opcode starts with "0x0f". This covers conditional branches, but
> > unfortunately also counts many MMX instructions. Otherwise though
> > it is deterministic.
> >
> > Vince
> > vweav...@eecs.utk.edu
> >
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> >
>
>
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