On 01/10/2018 12:01 AM, Andreas Beckmann wrote:
> Hi,
>
> I uploaded libpfm4 4.9 to Debian yesterday, but the build failed
> on a few architectures:
>
> https://buildd.debian.org/status/package.php?p=libpfm4
Hi,
I have an emulated mips enivronment and was able to verify that the attached
patch for mips fixes that problem.
For the sparc processors it looks like the same event number measures a
different event depending on what register it is programmed into. Looking
through sparc documentation the dispatch0_2n_br looks like it should be
register 0, so expect that the Dispatch0_rs_mispred should be register 1. The
other attached patch should address the problem, but has not been tested and
should have someone verify that it is correct.
-Will
>
> mips*:
> =====
>
> ./tests/validate
> Libpfm structure tests:
> libpfm ABI version : 0
> pfm_pmu_info_t : Passed
> pfm_event_info_t : Passed
> pfm_event_attr_info_t : Passed
> pfm_pmu_encode_arg_t : Passed
> pfm_perf_encode_arg_t : Passed
> Libpfm internal table tests:
> checking mips_74k (122 events): cannot encode event
> mips_74k::OCP_WRITE_CACHEABLE REQUESTS : invalid parameters
> Failed
> checking perf (80 events): Passed
> checking perf_raw (1 events): Passed
> Architecture specific tests:
> 14 MIPS events: 0 errors
> Total 1 errors
>
>
> sparc64:
> =======
>
> ./tests/validate
> Libpfm structure tests:
> libpfm ABI version : 0
> pfm_pmu_info_t : Passed
> pfm_event_info_t : Passed
> pfm_event_attr_info_t : Passed
> pfm_pmu_encode_arg_t : Passed
> pfm_perf_encode_arg_t : Passed
> Libpfm internal table tests:
> checking ultra12 (22 events): Passed
> checking ultra3 (65 events): pmu: ultra3 event12: Dispatch0_2nd_br
> code: 0x4 is duplicated in event24 : Dispatch0_rs_mispred
> Failed
> checking ultra3i (63 events): pmu: ultra3i event12: Dispatch0_2nd_br
> code: 0x4 is duplicated in event24 : Dispatch0_rs_mispred
> Failed
> checking ultra3p (71 events): pmu: ultra3p event12: Dispatch0_2nd_br
> code: 0x4 is duplicated in event24 : Dispatch0_rs_mispred
> Failed
> checking ultra4p (103 events): Passed
> checking niagara1 (9 events): Passed
> checking niagara2 (8 events): Passed
> checking perf (80 events): Passed
> checking perf_raw (1 events): Passed
> Architecture specific tests:
> Total 3 errors
>
>
> Andreas
>
> ------------------------------------------------------------------------------
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>From 02e34cbb259f8a3f148bbcbce4ec8fee5ad7931c Mon Sep 17 00:00:00 2001
From: William Cohen <wco...@redhat.com>
Date: Wed, 10 Jan 2018 14:09:03 -0500
Subject: [PATCH 1/2] Correct the MIPS 74K OCP_WRITE_CACHEABLE_REQUESTS name
---
lib/events/mips_74k_events.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/events/mips_74k_events.h b/lib/events/mips_74k_events.h
index 523627b..7615ebc 100644
--- a/lib/events/mips_74k_events.h
+++ b/lib/events/mips_74k_events.h
@@ -592,7 +592,7 @@ static const mips_entry_t mips_74k_pe []={
.desc = "OCP write requests accepted",
},
{
- .name = "OCP_WRITE_CACHEABLE REQUESTS",
+ .name = "OCP_WRITE_CACHEABLE_REQUESTS",
.code = 0xc6,
.desc = "OCP cacheable write requests accepted",
},
--
2.14.3
>From 42f075551a5d9cc06c7ea197f544469bc4913374 Mon Sep 17 00:00:00 2001
From: William Cohen <wco...@redhat.com>
Date: Wed, 10 Jan 2018 14:36:14 -0500
Subject: [PATCH 2/2] Correct the register used for SPARC Ultra 3
Dispatch0_rs_mispred event.
---
lib/events/sparc_ultra3_events.h | 2 +-
lib/events/sparc_ultra3i_events.h | 2 +-
lib/events/sparc_ultra3plus_events.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/events/sparc_ultra3_events.h b/lib/events/sparc_ultra3_events.h
index c19097d..807cefa 100644
--- a/lib/events/sparc_ultra3_events.h
+++ b/lib/events/sparc_ultra3_events.h
@@ -149,7 +149,7 @@ static const sparc_entry_t ultra3_pe[] = {
{
.name = "Dispatch0_rs_mispred",
.desc = "I-buffer is empty due to a Return Address Stack misprediction",
- .ctrl = PME_CTRL_S0,
+ .ctrl = PME_CTRL_S1,
.code = 0x4,
},
{
diff --git a/lib/events/sparc_ultra3i_events.h b/lib/events/sparc_ultra3i_events.h
index f81213e..8585f90 100644
--- a/lib/events/sparc_ultra3i_events.h
+++ b/lib/events/sparc_ultra3i_events.h
@@ -149,7 +149,7 @@ static const sparc_entry_t ultra3i_pe[] = {
{
.name = "Dispatch0_rs_mispred",
.desc = "I-buffer is empty due to a Return Address Stack misprediction",
- .ctrl = PME_CTRL_S0,
+ .ctrl = PME_CTRL_S1,
.code = 0x4,
},
{
diff --git a/lib/events/sparc_ultra3plus_events.h b/lib/events/sparc_ultra3plus_events.h
index b1dc8ca..5a3bea5 100644
--- a/lib/events/sparc_ultra3plus_events.h
+++ b/lib/events/sparc_ultra3plus_events.h
@@ -149,7 +149,7 @@ static const sparc_entry_t ultra3plus_pe[] = {
{
.name = "Dispatch0_rs_mispred",
.desc = "I-buffer is empty due to a Return Address Stack misprediction",
- .ctrl = PME_CTRL_S0,
+ .ctrl = PME_CTRL_S1,
.code = 0x4,
},
{
--
2.14.3
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