Hi Stefane, In review of the mips code and external tools like PAPI, oprofile and pfmon, it seems that the PLM bit definitions are bad for MIPS. Why, because they are different that what other tools expect.
I know we had this discussion before, but each tool expects PLM3 to be user and PLM0 to be kernel. It does not seem necessary to add an API call to determine the PLM mapping. I suggest we standardize PLM0 be kernel, PLM3 be user, PLM 1 be interrupt and PLM2 be hyper/supervisor. Yes, this is non-intuitive, but it seems to go along with the current standard. This would require a few lines of change in libpfm. It looks like none of the other processors support anything other than kernel or user. Phil _______________________________________________ perfmon mailing list [email protected] http://www.hpl.hp.com/hosted/linux/mail-archives/perfmon/
