On 4/27/2011 12:10 AM, Brad Roberts wrote:
It's a dual core amd:
vendor_id : AuthenticAMD
cpu family : 15
model : 75
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 3800+
stepping : 2
cpu MHz : 1000.000
cache size : 512 KB
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush mmx fxsr sse sse2 ht
syscall nx mmxext fxsr_opt rdtscp lm 3dnowext 3dnow rep_good extd_apicid pni
cx16 lahf_lm cmp_legacy svm extapic cr8_legacy
Actually, showing up on one box but not another is strong evidence of a
concurrency bug in my experience. Different
cpu's at different speeds, with different speed memory and other side
components change timings enough to expose bugs
that otherwise haven't occurred elsewhere.
Also, I found one potential explanation. I changed at the last minute
from using my own ASM blocks for atomic loads to core.atomic, now that
atomicLoad is exposed. I wrote a wrapper function around it that casts
stuff to shared. The way I was doing the cast is probably invalid code
(because cast(shared) someValue is not an lvalue; look at the latest
changeset for details) but was being accepted by the compiler and doing
God only knows what, possibly a non-atomic load at some point.
At any rate, can I have SSH accts on the testers so that if these tests
fail I'll have access to a computer that can reproduce the failures?
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