Kevin, check http://webster.cs.ucr.edu/Page_asm/Doc386/LAR.HTM as it
supports my claims. Windows appears to generate lar with these types,
certainly because it is assumed that they are valid types. The documents
I originally used are the intel 386 manual in ascii form, obtained from
www.x86.org. Am I wrong??
Kevin Lawton wrote:
>
> Willow Schlanger wrote:
> >
> > This is a "human" patch because I don't know how to use any patching
> > programs.
>
> diff -u old-file new-file
>
> > Look in protect_ctrl.cc and find this:
> >
> > void
> > LAR_GvEw(vm_t *vm)
> > {
> >
> > Then skip to this:
> >
> > else { /* system or gate segment */
> > switch ( cache.desc.type ) {
> > case 1: /* available TSS */
> > case 2: /* LDT */
> > case 3: /* busy TSS */
> > case 4: /* 286 call gate */
> > case 5: /* task gate */
> >
> > And add this (if you don't believe me, check the docs):
>
> I just briefly checked docs from Intel. From the 386 book
> to the IASDM, the current code switch statement is correct.
> That's not to say they are correct.
>
> Which docs are you looking at?
>
> --
> =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
> Kevin Lawton [EMAIL PROTECTED]
> MandrakeSoft, Inc. Plex86 developer
> http://www.linux-mandrake.com/ http://www.plex86.org/
