I have one query abt makefile.
Assuming you are using GNU make.
But the problem here is, how do i access environment variables in the makefile?
Let VARIABLE be the _exported_ environment variable in the shell (bash/tcsh) that you are executing 'make' and want to refer to in your Makefile. You access VARIABLE as $(VARIABLE) in your Makefile.
Now, assume that if the VARIABLE has value 'yes' then you want to echo 'true', otherwise you want to echo 'false'. Your makefile would look something like this:
---------------------- Makefile starts -------------------------------
all:
ifeq (yes,$(VARIABLE))
echo 'true'
else
echo 'false'
endif
----------------------- Makefile ends --------------------------------
This can be easily changed to your expectations:
depending upon the exports i need to have different rules to be executed in the makefile.
The Makefile would probably look like this: ---------------------- Makefile starts ------------------------------- ifeq (yes,$(VARIABLE)) all: truerule else all: falserule endif
truerule:
echo 'true'falserule:
echo 'false'
----------------------- Makefile ends --------------------------------Refer to http://www.gnu.org/software/make/manual/html_mono/make.html for further information.
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