I'm trying this on a SUSE Linux system (which already has 
acpidump and iasl installed) and iasl complains:

Intel ACPI Component Architecture
AML Disassembler version 20060127 [Jun 16 2006]
Copyright (C) 2000 - 2006 Intel Corporation
Supports ACPI Specification Revision 3.0a

Loading Acpi table from file cpu-pss.dat
ACPI Error (tbutils-0252): Table signature at 0x7fffa318a0f0 
[0x7fffa318a0cc] has invalid characters [20060127]
ACPI Warning (tbutils-0255): Invalid table signature found: 
[????] [20060127]
Table header is invalid!
Could not get table from the file


Do I need a newer version of the pmtools package?

-- jdh



Mark Haywood wrote:
> Mark Haywood wrote:
>> Things just aren't easy anymore. Your _PSS objects (the ACPI objects 
>> that define your supported speeds) are being loaded dynamically. You'll 
>> need to dump them using acpidump. You'll have to get acpidump from 
>> blastwave. You'll probably want to reference Aubrey's note on how to use 
>> acpidump:
>>
>> http://markmail.org/message/r3k6xhfazppsnjkr#query:acpidump%20blastwave+page:1+mid:4bf67hg2yyctyvop+state:results
>>
>> Note that you want to dump:
>>
>>            "CPU0IST ",
>>             0xCFE7C136,
>>             0x0000021F,
>>
>> This means you will have to execute the following commands:
>>
>> # *acpidump* --addr 0xCFE7C136 --length 0x0000021F > cpu-pss.dat
>> # iasl -d cpu-pss.dat
>>
>> Then you might want to send the pss.dat file as an attachment.
>>   
> 
> Make that "... send the cpu-pss.dsl  file as an attachment.
>> Did you try disabling SpeedStep?
>>
>> Mark
>>
>> Stephane wrote:
>>   
>>> I run the "iasl -g" command :
>>>
>>> 2:01:25 zeblods at ZeblodServer:~/test % sudo ./iasl -g                     
>>>  
>>>
>>> Intel ACPI Component Architecture
>>> ASL Optimizing Compiler version 20070508 [May  8 2007]
>>> Copyright (C) 2000 - 2007 Intel Corporation
>>> Supports ACPI Specification Revision 3.0a
>>>
>>> There are 8 tables defined in the RSDT
>>>
>>>         Table [FACP] written to "FACP__.dat"
>>>         Table [MCFG] written to "MCFG__.dat"
>>>         Table [APIC] written to "APIC__.dat"
>>>         Table [BOOT] written to "BOOT__.dat"
>>>         Table [SPCR] written to "SPCR__.dat"
>>>         Table [SSDT] will be written later
>>>         Table [SSDT] will be written later
>>>         Table [SSDT] will be written later
>>>
>>>
>>> Table [FACS] written to "FACS__.dat"
>>>
>>> Table [DSDT] written to "DSDT_MUKLTEO2.dat"
>>>
>>> Table [SSDT_0] written to "SSDT_0_Cpu0Tst.dat"
>>> Table [SSDT_1] written to "SSDT_1_Cpu1Tst.dat"
>>> Table [SSDT_2] written to "SSDT_2_CpuPm.dat"
>>>
>>> Disassembly of DSDT
>>> Pass 1 parse of [DSDT]
>>> Pass 2 parse of [DSDT]
>>> Parsing Deferred Opcodes (Methods/Buffers/Packages/Regions)
>>> ................................................................................................................................................................................................................................................................................................................................................................
>>> Parsing completed
>>> Disassembly completed, written to "dsdt_MUKLTEO2.dsl"
>>>
>>> Disassembly of SSDT[0]
>>> Pass 1 parse of [SSDT]
>>> Pass 2 parse of [SSDT]
>>> Parsing Deferred Opcodes (Methods/Buffers/Packages/Regions)
>>> ...............................
>>> Parsing completed
>>> Disassembly completed, written to "ssdt_0_Cpu0Tst.dsl"
>>>
>>> Disassembly of SSDT[1]
>>> Pass 1 parse of [SSDT]
>>> Pass 2 parse of [SSDT]
>>> Parsing Deferred Opcodes (Methods/Buffers/Packages/Regions)
>>> .......
>>> Parsing completed
>>> Disassembly completed, written to "ssdt_1_Cpu1Tst.dsl"
>>>
>>> Disassembly of SSDT[2]
>>> Pass 1 parse of [SSDT]
>>> Pass 2 parse of [SSDT]
>>> Parsing Deferred Opcodes (Methods/Buffers/Packages/Regions)
>>> .........................................
>>> Parsing completed
>>> Disassembly completed, written to "ssdt_2_CpuPm.dsl"
>>>
>>>
>>> I have now lot of files but I don't understand them... So I attached them.
>>>
>>> For the BIOS, I did not find the SpeedStep  option, just :
>>> Core Multi-Processing: [Enabled]
>>> Set Max Ext CPUID = 3 [Disabled]
>>> Numbers of Stop Grant [Per Core]
>>> C1 Enhanced Mode [Disabled]
>>> Intel ? Virtualization Technology [Disabled]
>>> No Execute Mode Mem Protection [Enabled]
>>> Processor Power Management: [GV1/GV3 Only]
>>>
>>> And when I put the "Processor Power Management" my server don't start...
>>>
>>> My motherbord is a Tyan i3010W.
>>>   
>>> ------------------------------------------------------------------------
>>>
>>> _______________________________________________
>>> pm-discuss mailing list
>>> pm-discuss at opensolaris.org
>>> http://mail.opensolaris.org/mailman/listinfo/pm-discuss
>>>     
>> _______________________________________________
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>> pm-discuss at opensolaris.org
>> http://mail.opensolaris.org/mailman/listinfo/pm-discuss
>>   
> 
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-- 

---------------------
     Julia Harper, julia.harper at sun.com


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