I would like to run the example fixed function accelerator. I am following the instructions under the section "System-on-a-chip design with AlmaIF Integrator" in the TCE user manual. However I am not able to execute the very first step of generating the processor. I am unable to build TCE on my computer even though I am following the instructions given. The error is to do with LLVM and I'm not sure of how to resolve it.
I am unsure as to whether this first step of generating the processor is necessary since the VHDL code of the accelerator is already present in the POCL github repository. I have tried to include the RTL sub-directory in github in a Vivado project. However I am unable to instantiate the TTA cores in the block design as TTA core does not get listed as an IP. Can the steps involved in running the example fixed function accelerator kindly be shared with me? Thanks and regards Suhas
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