ports@,

I do have a local diff to update gcc to 16.2.0

Changes not that big, but I had briefly tested it in amd64 only.

Probably we have a room to go it in for 8.0 release.

Thoughts?

Index: Makefile
===================================================================
RCS file: /home/cvs/ports/lang/gcc/16/Makefile,v
diff -u -p -r1.19 Makefile
--- Makefile    10 Sep 2026 12:53:43 -0000      1.19
+++ Makefile    11 Sep 2026 16:10:50 -0000
@@ -17,11 +17,9 @@ USE_NOEXECONLY = Yes
 # - default to gnu17 (instead of gnu23)
 # - turn -Wimplicit-function-declaration and -Wincompatible-pointer-types
 #   into simple warnings.
-V = 16.1.0
+V = 16.2.0
 GCC_PKGSPEC = >=16,<17
 
-REVISION = 11
-
 # aarch64, powerpc64 and sparc64 bootstrap contain only gdc
 BOOTSTRAP-aarch64 = gcc-bootstrap-aarch64-16.1.0-0.tar.xz
 BOOTSTRAP-amd64 = gcc-bootstrap-amd64-16.1.0-0.tar.xz
@@ -34,7 +32,7 @@ BOOTSTRAP-powerpc64 = gcc-bootstrap-powe
 BOOTSTRAP-riscv64 = gcc-bootstrap-riscv64-16.1.0-0.tar.xz
 BOOTSTRAP-sparc64 = gcc-bootstrap-sparc64-16.1.0-1.tar.xz
 
-SHARED_LIBS =  estdc++         22.0 \
+SHARED_LIBS =  estdc++         23.0 \
                gfortran        11.0 \
                objc            11.0 \
                lto_plugin      8.0 \
Index: distinfo
===================================================================
RCS file: /home/cvs/ports/lang/gcc/16/distinfo,v
diff -u -p -r1.9 distinfo
--- distinfo    1 Sep 2026 22:28:55 -0000       1.9
+++ distinfo    11 Sep 2026 13:39:02 -0000
@@ -1,4 +1,4 @@
-SHA256 (gcc/gcc-16.1.0.tar.xz) = UO+02Uwzl6/zsNYaWr10i03THZ0/Kre+BbFx02pRD3k=
+SHA256 (gcc/gcc-16.2.0.tar.xz) = 5nOOKVl/czJwcxqpBgDzf/3ARQed/CfsfoGSzIEIXD4=
 SHA256 (gcc/gcc-bootstrap-aarch64-16.1.0-0.tar.xz) = 
qapWvvWsb1/uv6orN63v8QTWxOP0VV/lZTRx9OJ6fHU=
 SHA256 (gcc/gcc-bootstrap-amd64-16.1.0-0.tar.xz) = 
BZxeecgTWJbJWXxigIuVyFFoIahsVzexoJYNjNV4qyA=
 SHA256 (gcc/gcc-bootstrap-arm-16.1.0-0.tar.xz) = 
ndwUrDAMJQscIld2dkVAHnIQwFmAUzxIPMA1rmx3LAc=
@@ -8,7 +8,7 @@ SHA256 (gcc/gcc-bootstrap-powerpc-16.1.0
 SHA256 (gcc/gcc-bootstrap-powerpc64-16.1.0-0.tar.xz) = 
2zEevZartfir4FoNIeP5UhWLUnZX4sqMnyisg7h4TNg=
 SHA256 (gcc/gcc-bootstrap-riscv64-16.1.0-0.tar.xz) = 
R4DaT0kLbPVlFXGF19+Bk9/dtfL+r348OPAUmmTnnWM=
 SHA256 (gcc/gcc-bootstrap-sparc64-16.1.0-1.tar.xz) = 
7FZ++qUTpA3i+2W3gbDEcndnFTFZSd9s9KKU5PyxTmA=
-SIZE (gcc/gcc-16.1.0.tar.xz) = 102456900
+SIZE (gcc/gcc-16.2.0.tar.xz) = 107200820
 SIZE (gcc/gcc-bootstrap-aarch64-16.1.0-0.tar.xz) = 97622328
 SIZE (gcc/gcc-bootstrap-amd64-16.1.0-0.tar.xz) = 141583400
 SIZE (gcc/gcc-bootstrap-arm-16.1.0-0.tar.xz) = 86586424
Index: patches/patch-gcc_c_c-decl_cc
===================================================================
RCS file: /home/cvs/ports/lang/gcc/16/patches/patch-gcc_c_c-decl_cc,v
diff -u -p -r1.1.1.1 patch-gcc_c_c-decl_cc
--- patches/patch-gcc_c_c-decl_cc       2 Jun 2026 20:00:17 -0000       1.1.1.1
+++ patches/patch-gcc_c_c-decl_cc       11 Sep 2026 13:48:43 -0000
@@ -3,7 +3,7 @@ Revert turning -Wimplicit-function-decla
 Index: gcc/c/c-decl.cc
 --- gcc/c/c-decl.cc.orig
 +++ gcc/c/c-decl.cc
-@@ -3709,13 +3709,13 @@ implicit_decl_permerror (location_t loc, tree id, tree
+@@ -3710,13 +3710,13 @@ implicit_decl_permerror (location_t loc, tree id, tree
        {
          gcc_rich_location richloc (loc);
          richloc.add_fixit_replace (suggestion);
@@ -19,7 +19,7 @@ Index: gcc/c/c-decl.cc
                                "implicit declaration of function %qE", id);
      }
    else if (const char *suggestion = hint.suggestion ())
-@@ -6726,6 +6726,8 @@ warn_variable_length_array (tree name, tree size)
+@@ -6728,6 +6728,8 @@ warn_variable_length_array (tree name, tree size)
        pedwarn_c90 (input_location, OPT_Wvla, "ISO C90 forbids variable "
                     "length array");
      }
Index: patches/patch-gcc_c_c-typeck_cc
===================================================================
RCS file: /home/cvs/ports/lang/gcc/16/patches/patch-gcc_c_c-typeck_cc,v
diff -u -p -r1.1.1.1 patch-gcc_c_c-typeck_cc
--- patches/patch-gcc_c_c-typeck_cc     2 Jun 2026 20:00:17 -0000       1.1.1.1
+++ patches/patch-gcc_c_c-typeck_cc     11 Sep 2026 13:48:38 -0000
@@ -3,7 +3,7 @@ Revert turning -Wincompatible-pointer-ty
 Index: gcc/c/c-typeck.cc
 --- gcc/c/c-typeck.cc.orig
 +++ gcc/c/c-typeck.cc
-@@ -9152,7 +9152,7 @@ convert_for_assignment (location_t location, location_
+@@ -9169,7 +9169,7 @@ convert_for_assignment (location_t location, location_
                gcc_rich_location richloc (expr_loc, &rhs_label,
                                           highlight_colors::actual);
                warned
@@ -12,7 +12,7 @@ Index: gcc/c/c-typeck.cc
                                   "passing argument %d of %qE from "
                                   "incompatible pointer type",
                                   parmnum, rname);
-@@ -9163,13 +9163,13 @@ convert_for_assignment (location_t location, location_
+@@ -9180,13 +9180,13 @@ convert_for_assignment (location_t location, location_
            case ic_assign:
              if (bltin)
                warned
@@ -28,7 +28,7 @@ Index: gcc/c/c-typeck.cc
                                   "assignment to %e from incompatible "
                                   "pointer type %e",
                                   &e_type, &e_rhstype);
-@@ -9178,13 +9178,13 @@ convert_for_assignment (location_t location, location_
+@@ -9195,13 +9195,13 @@ convert_for_assignment (location_t location, location_
            case ic_init_const:
              if (bltin)
                warned
@@ -44,7 +44,7 @@ Index: gcc/c/c-typeck.cc
                                    "initialization of %e from incompatible "
                                    "pointer type %e",
                                    &e_type, &e_rhstype);
-@@ -9192,13 +9192,13 @@ convert_for_assignment (location_t location, location_
+@@ -9209,13 +9209,13 @@ convert_for_assignment (location_t location, location_
            case ic_return:
              if (bltin)
                warned
Index: patches/patch-gcc_common_opt
===================================================================
RCS file: /home/cvs/ports/lang/gcc/16/patches/patch-gcc_common_opt,v
diff -u -p -r1.1.1.1 patch-gcc_common_opt
--- patches/patch-gcc_common_opt        2 Jun 2026 20:00:17 -0000       1.1.1.1
+++ patches/patch-gcc_common_opt        11 Sep 2026 13:48:38 -0000
@@ -1,7 +1,7 @@
 Index: gcc/common.opt
 --- gcc/common.opt.orig
 +++ gcc/common.opt
-@@ -695,6 +695,10 @@ Wnull-dereference
+@@ -694,6 +694,10 @@ Wnull-dereference
  Common Var(warn_null_dereference) Warning
  Warn if dereferencing a NULL pointer may lead to erroneous or undefined 
behavior.
  
@@ -12,7 +12,7 @@ Index: gcc/common.opt
  Wunsafe-loop-optimizations
  Common Ignore Warning
  Does nothing. Preserved for backward compatibility.
-@@ -826,7 +830,7 @@ Warn about statements between switch's controlling exp
+@@ -825,7 +829,7 @@ Warn about statements between switch's controlling exp
  case.
  
  Wsystem-headers
@@ -21,7 +21,7 @@ Index: gcc/common.opt
  Do not suppress warnings from system headers.
  
  Wtautological-compare
-@@ -895,6 +899,10 @@ Wunused-variable
+@@ -894,6 +898,10 @@ Wunused-variable
  Common Var(warn_unused_variable) Warning EnabledBy(Wunused)
  Warn when a variable is unused.
  
@@ -32,7 +32,7 @@ Index: gcc/common.opt
  Wcoverage-mismatch
  Common Var(warn_coverage_mismatch) Init(1) Warning
  Warn in case profiles in -fprofile-use do not match.
-@@ -1090,7 +1098,7 @@ Common Joined RejectNegative UInteger Var(flag_abi_ver
+@@ -1089,7 +1097,7 @@ Common Joined RejectNegative UInteger Var(flag_abi_ver
  The version of the C++ ABI in use.
  
  faggressive-loop-optimizations
@@ -41,7 +41,7 @@ Index: gcc/common.opt
  Aggressively optimize loops using language constraints.
  
  falign-functions
-@@ -1403,7 +1411,7 @@ Common Var(flag_delete_dead_exceptions) Init(0) Optimi
+@@ -1402,7 +1410,7 @@ Common Var(flag_delete_dead_exceptions) Init(0) Optimi
  Delete dead instructions that may throw exceptions.
  
  fdelete-null-pointer-checks
@@ -50,7 +50,7 @@ Index: gcc/common.opt
  Delete useless null pointer checks.
  
  fdep-fusion
-@@ -2007,7 +2015,7 @@ Enum(hardcfr_check_noreturn_calls) String(always) Valu
+@@ -2006,7 +2014,7 @@ Enum(hardcfr_check_noreturn_calls) String(always) Valu
  ; Nonzero means do not emit .ident assembler directives and ignore
  ; `#ident' preprocessor directives.
  fident
@@ -59,7 +59,7 @@ Index: gcc/common.opt
  Emit .ident assembler directives.
  
  fif-conversion
-@@ -2122,7 +2130,7 @@ Common RejectNegative Alias(fcf-protection=,full)
+@@ -2121,7 +2129,7 @@ Common RejectNegative Alias(fcf-protection=,full)
  Equivalent to -fcf-protection=full.
  
  fcf-protection=
@@ -68,7 +68,7 @@ Index: gcc/common.opt
  -fcf-protection=[full|branch|return|none|check]       Instrument functions 
with checks to verify jump/call/return control-flow transfer
  instructions have valid targets.
  
-@@ -3072,7 +3080,7 @@ Common RejectNegative Joined Var(common_deferred_optio
+@@ -3071,7 +3079,7 @@ Common RejectNegative Joined Var(common_deferred_optio
  -fstack-limit-symbol=<name>   Trap if the stack goes past symbol <name>.
  
  fstack-protector
@@ -77,7 +77,7 @@ Index: gcc/common.opt
  Use propolice as a stack protection method.
  
  fstack-protector-all
-@@ -3867,6 +3875,9 @@ no-canonical-prefixes
+@@ -3866,6 +3874,9 @@ no-canonical-prefixes
  Driver
  
  nodefaultlibs
Index: patches/patch-gcc_config_i386_i386_cc
===================================================================
RCS file: /home/cvs/ports/lang/gcc/16/patches/patch-gcc_config_i386_i386_cc,v
diff -u -p -r1.1.1.1 patch-gcc_config_i386_i386_cc
--- patches/patch-gcc_config_i386_i386_cc       2 Jun 2026 20:00:17 -0000       
1.1.1.1
+++ patches/patch-gcc_config_i386_i386_cc       11 Sep 2026 13:48:38 -0000
@@ -1,7 +1,7 @@
 Index: gcc/config/i386/i386.cc
 --- gcc/config/i386/i386.cc.orig
 +++ gcc/config/i386/i386.cc
-@@ -7061,6 +7061,7 @@ ix86_compute_frame_layout (void)
+@@ -7063,6 +7063,7 @@ ix86_compute_frame_layout (void)
        }
      }
  
@@ -9,7 +9,7 @@ Index: gcc/config/i386/i386.cc
    frame->nregs = ix86_nsaved_regs ();
    frame->nsseregs = ix86_nsaved_sseregs ();
  
-@@ -9447,6 +9448,9 @@ ix86_expand_prologue (void)
+@@ -9493,6 +9494,9 @@ ix86_expand_prologue (void)
          RTX_FRAME_RELATED_P (insn) = 1;
        }
      }
Index: patches/patch-gcc_config_i386_i386_h
===================================================================
RCS file: /home/cvs/ports/lang/gcc/16/patches/patch-gcc_config_i386_i386_h,v
diff -u -p -r1.1.1.1 patch-gcc_config_i386_i386_h
--- patches/patch-gcc_config_i386_i386_h        2 Jun 2026 20:00:17 -0000       
1.1.1.1
+++ patches/patch-gcc_config_i386_i386_h        11 Sep 2026 13:48:38 -0000
@@ -9,7 +9,7 @@ Index: gcc/config/i386/i386.h
  #include "config/vxworks-dummy.h"
  
  #include "config/i386/i386-opts.h"
-@@ -2736,6 +2737,8 @@ struct GTY(()) ix86_frame
+@@ -2756,6 +2757,8 @@ struct GTY(()) ix86_frame
    HOST_WIDE_INT stack_realign_allocate;
    HOST_WIDE_INT stack_realign_offset;
    HOST_WIDE_INT sse_reg_save_offset;
Index: patches/patch-gcc_config_mips_mips_h
===================================================================
RCS file: /home/cvs/ports/lang/gcc/16/patches/patch-gcc_config_mips_mips_h,v
diff -u -p -r1.1.1.1 patch-gcc_config_mips_mips_h
--- patches/patch-gcc_config_mips_mips_h        2 Jun 2026 20:00:17 -0000       
1.1.1.1
+++ patches/patch-gcc_config_mips_mips_h        11 Sep 2026 13:48:38 -0000
@@ -11,7 +11,7 @@ Index: gcc/config/mips/mips.h
  
  /* This macro defines names of additional specifications to put in the specs
     that can be used in various specifications like CC1_SPEC.  Its definition
-@@ -3491,18 +3493,6 @@ struct GTY(())  machine_function {
+@@ -3487,18 +3489,6 @@ struct GTY(())  machine_function {
     with arguments ARGS.  */
  #define PMODE_INSN(NAME, ARGS) \
    (Pmode == SImode ? NAME ## _si ARGS : NAME ## _di ARGS)
Index: patches/patch-gcc_configure
===================================================================
RCS file: /home/cvs/ports/lang/gcc/16/patches/patch-gcc_configure,v
diff -u -p -r1.1.1.1 patch-gcc_configure
--- patches/patch-gcc_configure 2 Jun 2026 20:00:17 -0000       1.1.1.1
+++ patches/patch-gcc_configure 11 Sep 2026 13:48:38 -0000
@@ -19,7 +19,7 @@ Index: gcc/configure
    shlibpath_var=LD_LIBRARY_PATH
    if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test 
"$host_os-$host_cpu" = "openbsd2.8-powerpc"; then
      case $host_os in
-@@ -33386,7 +33386,7 @@ $as_echo "#define HAVE_LD_PPC_GNU_ATTR_LONG_DOUBLE 1" 
+@@ -33389,7 +33389,7 @@ $as_echo "#define HAVE_LD_PPC_GNU_ATTR_LONG_DOUBLE 1" 
  esac
  
  case "$target:$tm_file" in
@@ -28,7 +28,7 @@ Index: gcc/configure
    case "$target" in
       *le-*-linux*)
       emul_name="-melf64lppc"
-@@ -33400,6 +33400,10 @@ case "$target:$tm_file" in
+@@ -33403,6 +33403,10 @@ case "$target:$tm_file" in
       *-*-freebsd*)
       emul_name="-melf64ppc_fbsd"
        ;;
@@ -39,7 +39,7 @@ Index: gcc/configure
    esac
      { $as_echo "$as_me:${as_lineno-$LINENO}: checking linker support for 
omitting dot symbols" >&5
  $as_echo_n "checking linker support for omitting dot symbols... " >&6; }
-@@ -33699,6 +33703,7 @@ else
+@@ -33702,6 +33706,7 @@ else
  fi
  
          ;;
@@ -47,7 +47,7 @@ Index: gcc/configure
         *) gcc_cv_libc_provides_ssp=no ;;
      esac
    fi
-@@ -33719,6 +33724,7 @@ if test "${enable_default_ssp+set}" = set; then :
+@@ -33722,6 +33727,7 @@ if test "${enable_default_ssp+set}" = set; then :
  if test x$gcc_cv_libc_provides_ssp = xyes; then
    case "$target" in
      ia64*-*-*) enable_default_ssp=no ;;
@@ -55,7 +55,7 @@ Index: gcc/configure
      *) enable_default_ssp=$enableval ;;
    esac
  else
-@@ -33895,6 +33901,9 @@ $as_echo_n "checking dl_iterate_phdr in target C libra
+@@ -33898,6 +33904,9 @@ $as_echo_n "checking dl_iterate_phdr in target C libra
  gcc_cv_target_dl_iterate_phdr=unknown
  case "$target" in
    *-*-solaris2*)
Index: patches/patch-gcc_doc_extend_texi
===================================================================
RCS file: patches/patch-gcc_doc_extend_texi
diff -N patches/patch-gcc_doc_extend_texi
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ patches/patch-gcc_doc_extend_texi   11 Sep 2026 15:47:11 -0000
@@ -0,0 +1,368 @@
+Index: gcc/doc/extend.texi
+--- gcc/doc/extend.texi.orig
++++ gcc/doc/extend.texi
+@@ -1618,13 +1618,13 @@ The preprocessor symbols @code{__SEG_FS} and @code{__S
+ defined when these address spaces are supported.
+ @end table
+ 
+-@node Attributes
+ @anchor{Function Attributes}
+ @anchor{Variable Attributes}
+ @anchor{Type Attributes}
+ @anchor{Label Attributes}
+ @anchor{Enumerator Attributes}
+ @anchor{Statement Attributes}
++@node Attributes
+ @section Attributes Specific to GCC
+ @cindex attributes
+ @cindex declaring attributes
+@@ -1807,10 +1807,10 @@ ordinary functions or C++ member functions.
+ * Attribute Syntax::            Formal syntax for traditional GNU attributes.
+ @end menu
+ 
+-@node Common Attributes
+ @anchor{Common Function Attributes}
+ @anchor{Common Variable Attributes}
+ @anchor{Common Type Attributes}
++@node Common Attributes
+ @subsection Common Attributes
+ 
+ The following GNU-specific attributes are supported on most targets in
+@@ -5731,8 +5731,8 @@ The default for the attribute is controlled by @option
+ * Xstormy16 Attributes::
+ @end menu
+ 
+-@node AArch64 Attributes
+ @anchor{AArch64 Function Attributes}
++@node AArch64 Attributes
+ @subsubsection AArch64 Attributes
+ 
+ The following target-specific function attributes are available for the
+@@ -5954,8 +5954,8 @@ architectural feature rules specified above.
+ 
+ @end table
+ 
+-@node AMD GCN Attributes
+ @anchor{AMD GCN Function Attributes}
++@node AMD GCN Attributes
+ @subsubsection AMD GCN Attributes
+ 
+ These attributes are supported by the AMD GCN back end:
+@@ -6047,10 +6047,10 @@ OpenACC/OpenMP).
+ @end table
+ @end table
+ 
+-@node ARC Attributes
+ @anchor{ARC Function Attributes}
+ @anchor{ARC Type Attributes}
+ @anchor{ARC Variable Attributes}
++@node ARC Attributes
+ @subsubsection ARC Attributes
+ 
+ These attributes are supported by the ARC back end:
+@@ -6145,9 +6145,9 @@ without involving the additional semantic implications
+ loads and stores of data declared @code{uncached}.
+ @end table
+ 
+-@node ARM Attributes
+ @anchor{ARM Function Attributes}
+ @anchor{ARM Type Attributes}
++@node ARM Attributes
+ @subsubsection ARM Attributes
+ 
+ These attributes are supported for ARM targets:
+@@ -6326,9 +6326,9 @@ most Symbian OS code uses @code{__declspec}.)
+ 
+ @end table
+ 
+-@node AVR Attributes
+ @anchor{AVR Function Attributes}
+ @anchor{AVR Variable Attributes}
++@node AVR Attributes
+ @subsubsection AVR Attributes
+ 
+ These attributes are supported by the AVR back end:
+@@ -6671,9 +6671,9 @@ See also the @option{-mabsdata} @ref{AVR Options,comma
+ 
+ @end table
+ 
+-@node Blackfin Attributes
+ @anchor{Blackfin Function Attributes}
+ @anchor{Blackfin Variable Attributes}
++@node Blackfin Attributes
+ @subsubsection Blackfin Attributes
+ 
+ These attributes are supported by the Blackfin back end:
+@@ -6789,9 +6789,9 @@ the specific section named @code{.l1.data.A}. Those wi
+ attribute are put into the specific section named @code{.l1.data.B}.
+ @end table
+ 
+-@node BPF Attributes
+ @anchor{BPF Function Attributes}
+ @anchor{BPF Type Attributes}
++@node BPF Attributes
+ @subsubsection BPF Attributes
+ 
+ These attributes are supported by the BPF back end:
+@@ -6823,8 +6823,8 @@ of that type. The behavior is equivalent to manually
+ wrapping every such access with @code{__builtin_preserve_access_index}.
+ @end table
+ 
+-@node C-SKY Attributes
+ @anchor{C-SKY Function Attributes}
++@node C-SKY Attributes
+ @subsubsection C-SKY Attributes
+ 
+ These attributes are supported by the C-SKY back end:
+@@ -6847,8 +6847,8 @@ are ignored with a warning otherwise.  @xref{C-SKY Opt
+ @end table
+ 
+ 
+-@node Epiphany Attributes
+ @anchor{Epiphany Function Attributes}
++@node Epiphany Attributes
+ @subsubsection Epiphany Attributes
+ 
+ These attributes are supported by the Epiphany back end:
+@@ -6929,9 +6929,9 @@ command-line switch and @code{#pragma long_calls} sett
+ @end table
+ 
+ 
+-@node H8/300 Attributes
+ @anchor{H8/300 Function Attributes}
+ @anchor{H8/300 Variable Attributes}
++@node H8/300 Attributes
+ @subsubsection H8/300 Attributes
+ 
+ These attributes are available for H8/300 targets:
+@@ -7006,9 +7006,9 @@ on data in the tiny data section.  Note the tiny data 
+ slightly under 32KB of data.
+ @end table
+ 
+-@node IA-64 Attributes
+ @anchor{IA-64 Function Attributes}
+ @anchor{IA-64 Variable Attributes}
++@node IA-64 Attributes
+ @subsubsection IA-64 Attributes
+ 
+ These attributes are supported on IA-64 targets:
+@@ -7053,9 +7053,9 @@ independent and hence this attribute must not be used 
+ defined by shared libraries.
+ @end table
+ 
+-@node LoongArch Attributes
+ @anchor{LoongArch Function Attributes}
+ @anchor{LoongArch Variable Attributes}
++@node LoongArch Attributes
+ @subsubsection LoongArch Attributes
+ 
+ The following attributes are supported by the LoongArch back end:
+@@ -7383,8 +7383,8 @@ specially.  Currently the only supported values of @va
+ @code{normal} and @code{extreme}.
+ @end table
+ 
+-@node M32C Attributes
+ @anchor{M32C Function Attributes}
++@node M32C Attributes
+ @subsubsection M32C Attributes
+ 
+ These attributes are supported by the M32C back end:
+@@ -7455,9 +7455,9 @@ function entry and exit sequences suitable for use in 
+ when this attribute is present.
+ @end table
+ 
+-@node M32R/D Attributes
+ @anchor{M32R/D Function Attributes}
+ @anchor{M32R/D Variable Attributes}
++@node M32R/D Attributes
+ @subsubsection M32R/D Attributes
+ 
+ These attributes are supported by the M32R/D back end:
+@@ -7497,8 +7497,8 @@ and may not be reachable with the @code{bl} instructio
+ generates the much slower @code{seth/add3/jl} instruction sequence).
+ @end table
+ 
+-@node m68k Attributes
+ @anchor{m68k Function Attributes}
++@node m68k Attributes
+ @subsubsection m68k Attributes
+ 
+ These attributes are supported by the m68k back end:
+@@ -7526,8 +7526,8 @@ sequences and replaces the return instruction with a @
+ instruction.  This attribute is available only on fido.
+ @end table
+ 
+-@node MicroBlaze Attributes
+ @anchor{MicroBlaze Function Attributes}
++@node MicroBlaze Attributes
+ @subsubsection MicroBlaze Attributes
+ 
+ These attributes are supported on MicroBlaze targets:
+@@ -7572,9 +7572,9 @@ emits appropriate prologue code and generates a return
+ using @code{rtid} instead of @code{rtsd}.
+ @end table
+ 
+-@node Microsoft Windows Attributes
+ @anchor{Microsoft Windows Function Attributes}
+ @anchor{Microsoft Windows Variable Attributes}
++@node Microsoft Windows Attributes
+ @subsubsection Microsoft Windows Attributes
+ 
+ @cindex @code{__declspec}
+@@ -7733,8 +7733,8 @@ linkers work.  See @code{section} attribute for more i
+ The @code{shared} attribute is only available on Microsoft Windows@.
+ @end table
+ 
+-@node MIPS Attributes
+ @anchor{MIPS Function Attributes}
++@node MIPS Attributes
+ @subsubsection MIPS Attributes
+ 
+ These attributes are supported by the MIPS back end:
+@@ -7903,9 +7903,9 @@ The function can read the instruction stream in a pc-r
+ If there is no argument supplied, the default of @code{"yes"} applies.
+ @end table
+ 
+-@node MSP430 Attributes
+ @anchor{MSP430 Function Attributes}
+ @anchor{MSP430 Variable Attributes}
++@node MSP430 Attributes
+ @subsubsection MSP430 Attributes
+ 
+ These attributes are supported by the MSP430 back end:
+@@ -8009,8 +8009,8 @@ is used, and the @code{.lower} prefix is not added.
+ 
+ @end table
+ 
+-@node NDS32 Attributes
+ @anchor{NDS32 Function Attributes}
++@node NDS32 Attributes
+ @subsubsection NDS32 Attributes
+ 
+ These attributes are supported by the NDS32 back end:
+@@ -8074,9 +8074,9 @@ Provide a user-defined function to handle warm reset e
+ @end table
+ @end table
+ 
+-@node Nvidia PTX Attributes
+ @anchor{Nvidia PTX Function Attributes}
+ @anchor{Nvidia PTX Variable Attributes}
++@node Nvidia PTX Attributes
+ @subsubsection Nvidia PTX Attributes
+ 
+ These attributes are supported by the Nvidia PTX back end:
+@@ -8103,10 +8103,10 @@ within one thread block refer to the same instance of 
+ The runtime does not initialize variables in this memory space.
+ @end table
+ 
+-@node PowerPC Attributes
+ @anchor{PowerPC Function Attributes}
+ @anchor{PowerPC Type Attributes}
+ @anchor{PowerPC Variable Attributes}
++@node PowerPC Attributes
+ @subsubsection PowerPC Attributes
+ 
+ These attributes are supported by the PowerPC back end:
+@@ -8335,8 +8335,8 @@ These attributes mainly are intended to support the @c
+ @code{__pixel}, and @code{__bool} AltiVec keywords.
+ @end table
+ 
+-@node RISC-V Attributes
+ @anchor{RISC-V Function Attributes}
++@node RISC-V Attributes
+ @subsubsection RISC-V Attributes
+ 
+ These attributes are supported by the RISC-V back end:
+@@ -8449,9 +8449,9 @@ and @code{zbb} extensions and tunes it for @code{rocke
+ 
+ @end table
+ 
+-@node RL78 Attributes
+ @anchor{RL78 Function Attributes}
+ @anchor{RL78 Variable Attributes}
++@node RL78 Attributes
+ @subsubsection RL78 Attributes
+ 
+ These attributes are supported by the RL78 back end:
+@@ -8482,8 +8482,8 @@ which can be accessed more efficiently than the defaul
+ 
+ @end table
+ 
+-@node RX Attributes
+ @anchor{RX Function Attributes}
++@node RX Attributes
+ @subsubsection RX Attributes
+ 
+ These attributes are supported by the RX back end:
+@@ -8539,8 +8539,8 @@ function (i.e.@: it retains the normal C function call
+ @code{interrupt} attribute for a description of its arguments.
+ @end table
+ 
+-@node S/390 Attributes
+ @anchor{S/390 Function Attributes}
++@node S/390 Attributes
+ @subsubsection S/390 Attributes
+ 
+ These attributes are supported on the S/390:
+@@ -8609,8 +8609,8 @@ change any feature macros.  For example,
+ does not undefine the @code{__VEC__} macro.
+ @end table
+ 
+-@node SH Attributes
+ @anchor{SH Function Attributes}
++@node SH Attributes
+ @subsubsection SH Attributes
+ 
+ These attributes are supported on the SH family of processors:
+@@ -8706,16 +8706,16 @@ On SH targets this attribute is similar to @code{inter
+ but it does not save and restore all registers.
+ @end table
+ 
+-@node Symbian OS Attributes
+ @anchor{Symbian OS Function Attributes}
++@node Symbian OS Attributes
+ @subsubsection Symbian OS Attributes
+ 
+ @xref{Microsoft Windows Attributes}, for discussion of the
+ @code{dllexport} and @code{dllimport} attributes.
+ 
+-@node V850 Attributes
+ @anchor{V850 Function Attributes}
+ @anchor{V850 Variable Attributes}
++@node V850 Attributes
+ @subsubsection V850 Attributes
+ 
+ The V850 back end supports these attributes:
+@@ -8754,8 +8754,8 @@ Use it to explicitly place a variable in the first 32 
+ of memory.
+ @end table
+ 
+-@node Visium Attributes
+ @anchor{Visium Function Attributes}
++@node Visium Attributes
+ @subsubsection Visium Attributes
+ 
+ These attributes are supported by the Visium back end:
+@@ -8771,10 +8771,10 @@ function entry and exit sequences suitable for use in 
+ when this attribute is present.
+ @end table
+ 
+-@node x86 Attributes
+ @anchor{x86 Function Attributes}
+ @anchor{x86 Type Attributes}
+ @anchor{x86 Variable Attributes}
++@node x86 Attributes
+ @subsubsection x86 Attributes
+ 
+ These attributes are supported by the x86 back end:
+@@ -9782,9 +9782,9 @@ see @ref{x86 Options}, for details of how structure la
+ @end table
+ 
+ 
+-@node Xstormy16 Attributes
+ @anchor{Xstormy16 Function Attributes}
+ @anchor{Xstormy16 Variable Attributes}
++@node Xstormy16 Attributes
+ @subsubsection Xstormy16 Attributes
+ 
+ These attributes are supported by the Xstormy16 back end:
Index: patches/patch-gcc_doc_ifn_texi
===================================================================
RCS file: patches/patch-gcc_doc_ifn_texi
diff -N patches/patch-gcc_doc_ifn_texi
--- patches/patch-gcc_doc_ifn_texi      2 Jun 2026 20:00:17 -0000       1.1.1.1
+++ /dev/null   1 Jan 1970 00:00:00 -0000
@@ -1,30 +0,0 @@
-Index: gcc/doc/ifn.texi
---- gcc/doc/ifn.texi.orig
-+++ gcc/doc/ifn.texi
-@@ -743,7 +743,7 @@ The @code{IFN_VEC_WIDEN_PLUS} set of internal function
- the @code{vec_widen_sadd} and @code{vec_widen_uadd} instruction patterns,
- depending on the sign of the first argument. The @code{IFN_VEC_WIDEN_PLUS_LO}
- and @code{IFN_VEC_WIDEN_PLUS_HI} work on the low and high parts of a vector,
--the @code{IFN_VEC_WIDEN_PLUS_EVEN} and @code {IFN_VEC_WIDEN_PLUS_ODD}
-+the @code{IFN_VEC_WIDEN_PLUS_EVEN} and @code{IFN_VEC_WIDEN_PLUS_ODD}
- functions work on the even and odd elements of a vector.
- 
- @cindex @code{IFN_VEC_WIDEN_MINUS} internal function
-@@ -756,7 +756,7 @@ The @code{IFN_VEC_WIDEN_MINUS} set of internal functio
- @code{vec_widen_ssub} and @code{vec_widen_usub} instruction patterns,
- depending on the sign of the first argument. The @code{IFN_VEC_WIDEN_MINUS_LO}
- and @code{IFN_VEC_WIDEN_MINUS_HI} work on the low and high parts of a vector,
--the @code{IFN_VEC_WIDEN_MINUS_EVEN} and @code {IFN_VEC_WIDEN_MINUS_ODD}
-+the @code{IFN_VEC_WIDEN_MINUS_EVEN} and @code{IFN_VEC_WIDEN_MINUS_ODD}
- functions work on the even and odd elements of a vector.
- 
- @cindex @code{IFN_VEC_WIDEN_ABD} internal function
-@@ -769,7 +769,7 @@ The @code{IFN_VEC_WIDEN_ABD} set of internal functions
- @code{vec_widen_sabd} and @code{vec_widen_uabd} instruction patterns,
- depending on the sign of the first argument. The @code{IFN_VEC_WIDEN_ABD_LO}
- and @code{IFN_VEC_WIDEN_ABD_HI} work on the low and high parts of a vector,
--the @code{IFN_VEC_WIDEN_ABD_EVEN} and @code {IFN_VEC_WIDEN_ABD_ODD} functions
-+the @code{IFN_VEC_WIDEN_ABD_EVEN} and @code{IFN_VEC_WIDEN_ABD_ODD} functions
- work on the even and odd elements of a vector.
- 
- @end table
Index: patches/patch-gcc_doc_invoke_texi
===================================================================
RCS file: patches/patch-gcc_doc_invoke_texi
diff -N patches/patch-gcc_doc_invoke_texi
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ patches/patch-gcc_doc_invoke_texi   11 Sep 2026 15:47:09 -0000
@@ -0,0 +1,13 @@
+Index: gcc/doc/invoke.texi
+--- gcc/doc/invoke.texi.orig
++++ gcc/doc/invoke.texi
+@@ -21142,8 +21142,8 @@ problems or, in some cases, to provide workarounds for
+ for documentation of these internal parameters.
+ @end table
+ 
+-@node Target-Specific Options
+ @anchor{Submodel Options}
++@node Target-Specific Options
+ @section Target-Specific Options
+ @cindex submodel options
+ @cindex hardware-specific options
Index: patches/patch-libstdc++-v3_src_c++11_debug_cc
===================================================================
RCS file: 
/home/cvs/ports/lang/gcc/16/patches/patch-libstdc++-v3_src_c++11_debug_cc,v
diff -u -p -r1.1.1.1 patch-libstdc++-v3_src_c++11_debug_cc
--- patches/patch-libstdc++-v3_src_c++11_debug_cc       2 Jun 2026 20:00:17 
-0000       1.1.1.1
+++ patches/patch-libstdc++-v3_src_c++11_debug_cc       11 Sep 2026 13:48:38 
-0000
@@ -5,7 +5,7 @@ programs with libestdc++.
 Index: libstdc++-v3/src/c++11/debug.cc
 --- libstdc++-v3/src/c++11/debug.cc.orig
 +++ libstdc++-v3/src/c++11/debug.cc
-@@ -869,7 +869,7 @@ namespace
+@@ -868,7 +868,7 @@ namespace
    print_address(PrintContext& ctx, const char* fmt, const void* address)
    {
      char buf[128];
@@ -14,7 +14,7 @@ Index: libstdc++-v3/src/c++11/debug.cc
      print_word(ctx, buf, written);
    }
  
-@@ -881,7 +881,7 @@ namespace
+@@ -880,7 +880,7 @@ namespace
    print_integer(PrintContext& ctx, long integer)
    {
      char buf[64];
@@ -23,7 +23,7 @@ Index: libstdc++-v3/src/c++11/debug.cc
      print_word(ctx, buf, written);
    }
  
-@@ -1264,7 +1264,7 @@ namespace
+@@ -1263,7 +1263,7 @@ namespace
  
      PrintContext& ctx = *static_cast<PrintContext*>(data);
  
@@ -32,7 +32,7 @@ Index: libstdc++-v3/src/c++11/debug.cc
      print_word(ctx, buf, written);
  
      int ret = 0;
-@@ -1292,7 +1292,7 @@ namespace
+@@ -1291,7 +1291,7 @@ namespace
  
        if (lineno)
          {
@@ -41,7 +41,7 @@ Index: libstdc++-v3/src/c++11/debug.cc
            print_word(ctx, buf, written);
          }
        else
-@@ -1315,7 +1315,7 @@ namespace
+@@ -1314,7 +1314,7 @@ namespace
      if (errnum > 0)
        {
        char buf[64];
Index: patches/patch-libstdc++-v3_src_c++17_floating_to_chars_cc
===================================================================
RCS file: 
/home/cvs/ports/lang/gcc/16/patches/patch-libstdc++-v3_src_c++17_floating_to_chars_cc,v
diff -u -p -r1.1.1.1 patch-libstdc++-v3_src_c++17_floating_to_chars_cc
--- patches/patch-libstdc++-v3_src_c++17_floating_to_chars_cc   2 Jun 2026 
20:00:17 -0000       1.1.1.1
+++ patches/patch-libstdc++-v3_src_c++17_floating_to_chars_cc   11 Sep 2026 
13:48:38 -0000
@@ -5,7 +5,7 @@ programs with libestdc++.
 Index: libstdc++-v3/src/c++17/floating_to_chars.cc
 --- libstdc++-v3/src/c++17/floating_to_chars.cc.orig
 +++ libstdc++-v3/src/c++17/floating_to_chars.cc
-@@ -1073,14 +1073,14 @@ namespace
+@@ -1076,14 +1076,14 @@ namespace
          {
            // strfromf128 unfortunately doesn't allow .*
            char fmt[3 * sizeof(int) + 6];
Index: patches/patch-libstdc++-v3_src_c++20_format_cc
===================================================================
RCS file: 
/home/cvs/ports/lang/gcc/16/patches/patch-libstdc++-v3_src_c++20_format_cc,v
diff -u -p -r1.1.1.1 patch-libstdc++-v3_src_c++20_format_cc
--- patches/patch-libstdc++-v3_src_c++20_format_cc      2 Jun 2026 20:00:17 
-0000       1.1.1.1
+++ patches/patch-libstdc++-v3_src_c++20_format_cc      11 Sep 2026 13:48:38 
-0000
@@ -5,7 +5,7 @@ programs with libestdc++.
 Index: libstdc++-v3/src/c++20/format.cc
 --- libstdc++-v3/src/c++20/format.cc.orig
 +++ libstdc++-v3/src/c++20/format.cc
-@@ -189,8 +189,9 @@ __with_encoding_conversion(const locale& loc)
+@@ -199,8 +199,9 @@ __with_encoding_conversion(const locale& loc)
    // just don't delete[] it in the locale(locale, Facet*) constructor.
    if (const char* name = loc._M_impl->_M_names[0])
      {


-- 
wbr, Kirill

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