Brian Beesley wrote:
if you're taking PrimeNet assignments (either LL or double check)
then the issue is moot, as you won't be getting exponents under 10
million to work on.
Ah, this is what I wanted to know. I wasn't sure where the cut-off point was.
Query, isn't the 2MB cache of Pentium D chips shared across the cores?
Not exactly...the L2 cache isn't shared, but you're thinking of the
800 series (90nm) where each core had its own 1MB of L2 cache. The
newer 900 series (65nm) has 2MB for each core.
Rick.
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