Hello all,

        Me Again! Hope I can explane my Problem without to many spelling or speaking
mistakes.

        I try to layout a board where two Problems apear who seam to cause each other,
and I can not find a workaround.
1. I need to tent my vias half (gap -5mil)
2. I need to set them free from the Polygon, even if it is the same net.
        So I tried to make a design-rule for "Polygon Connecting Style" as "NoConnect".
But these works only for _Pads_ . I converted vias to free pads, works fine. But
now it seams I have no posibility to set a designrule for the soldermask for
these pads! The only manufacturing rule I know needs _Vias_ (ObjectKind | Vias).

Am I missing something? Anybody with a workaround?


Any Help appreciated,

Waldemar

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