The solution would be simple: LISTEN UP PROTEL/ALTIUM!!! If net classes became definable in Schematic then logically any bus would be an instance of a net class, with the class members being the nets attached to the bus.
Checking then becomes simple: if you try to attach a net that isn't a member of the class to a bus then an error is generated! Thus inadvertant net name spelling errors, etc., would be automatically picked up. I look forward to seeing this feature in the next release of Protel (Hint, hint :-) John Haddy > -----Original Message----- > From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]] > Sent: Wednesday, 31 October 2001 8:10 AM > To: Protel EDA Forum > Subject: Re: [PEDA] Bus in schematic > > > At 05:35 PM 10/30/01 +0300, ElectronTrade (info) wrote: > >My customer want to use bus with wires miscellaneous names on > >schematic. Is it posible? > > > >For example, in one bus must be next wires: > > > >Data1 > >Data2 > >. > >. > >. > >Data8 > >CLK > >GND > > > >How to create this bus correctly? > > The best way is to create a bus Data[1..8] and then a separate signal CLK. > > Buses on-sheet are cosmetic only, connectivity is established by net > labels, but if you go off-sheet and you do not wish to make explicit all > the net names in a bus, the bus must be in standard form, which should be > obvious, since we have no means of giving a bus a name distinct from the > signals within the bus. > > This would indeed be an improvement. If we could name a bus > "CONTROL," for > example, and we had a means of defining the signals which are members of > that bus, such as RD*, WR*, CLK, etc. -- I don't know right off what that > would look like -- then we could have miscellaneous names. But we > don't, so > we can't use a miscellaneous bus for intersheet connectivity. > > (You can use a bus for off-sheet connection if you have nets global, > because the net labels which you must put on wires coming off the > bus will > establish connectivity. But if intersheet connectivity is established by > Ports or by Ports and Sheet Symbol connections, with net labels only > applying to the single sheet on which they reside, you are stuck with > numerical sequence bus names only. --i.e., you can have more than one CLK > signal, a common situation when a schematic is put together from > pieces of > old projects.) > > [EMAIL PROTECTED] > Abdulrahman Lomax > Easthampton, Massachusetts USA > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
