Oops. Let me restate 5 & 6.
5 - 8 mils minimum over the max lead dimension
to 30 mils maximum over he minimum dimension
of the lead.
6 - Yes, 52 mils is good. See Above.
.042 max. across corners +.008 = .050
.028 min. across corners +.030 = .058
so hole size should be between 50 & 58 mils.
See what happens when you hurry.
Regards,
Steve Smith
Product Engineer
Staco Energy Products Co.
Web Site: www.stacoenergy.com
> -----Original Message-----
> From: Steve Smith
> Sent: Friday, December 07, 2001 5:18 PM
> To: 'Protel EDA Forum'
> Subject: Re: [PEDA] Starting out with Protel99, Questions
>
>
> I'll give it a try.
>
> 1 - 20 to 30 mils.
> 2 - After plating.
> 3 - It's more a factor of your minimum
> annular ring. I usually try for
> 10 to 15 mils depending on the
> density of the board and the current
> going thru the hole.
> 4 - Again it depends on density & current.
> I usually go with 20/40 & 25/50 (hole/pad)
> but most of my boards are not that dense.
> Many go as small as 12 & 15 mil holes.
> 5 - 8 mils minimum to 30 mils maximum over
> the max dimension of the lead.
> 6 - Yes, 52 mils is good. See Above.
> .042 across corners +.008 = .050
> .042 + .030 = .072 so hole size
> should be between 50 & 72 mils.
> 7 - Again it depends upon the amount of
> current.
>
> I suggest you get a copy of IPC-2221 & IPC-2222 from www.ipc.org.
> It will give you answers to many of your questions.
>
> Also do not forget to put a 50 mil or so trace around the boarder
> of the board on internal power & ground plane layers so that the
> planes do not extend to the edge of the board.
>
> Good luck,
> Steve Smith
> Product Engineer
> Staco Energy Products Co.
> Web Site: www.stacoenergy.com
>
>
> > -----Original Message-----
> > From: Paul Cooper - Myrica [mailto:[EMAIL PROTECTED]]
> > Sent: Friday, December 07, 2001 4:18 PM
> > To: Protel EDA Forum
> > Subject: [PEDA] Starting out with Protel99, Questions
> >
> >
> >
> >Am trying to layout my 1st board since college and have a few general
> >PCB layout questions. Board will be about 2x3", and max Frequency is
> >about 100Mhz, althoug most much slower.
> >
> >This is a test board, which will be made in the 10's, not a
> production
> >board (which is why a chip designer is doing it)
> >
> > 1) Is there a standard or rule of thub that can be applied to the
> > seperation for a split plane ?
> >
> > 2) For plated pads and vias, is hole size in layout before or after
> > plating. ie if i set hole size to be 50mil, will it
> compensate for
> > fact hole will be plated and compensate drill size so
> hole is 50mil
> > after plating?
> >
> > 3) Is there a standard or rule of thumb for dimensions of pad in
> > relation to hole size ? From most of the library components I
> > looked at, it seems hole is about 2/3 pad size.
> >
> > 4) Is there a standard via size/sizes ?
> >
> > 5) For a given size diameter component lead is there a guidline for
> > hole size ?
> >
> > 6) for a component with square pins, .025mil (+- .005) mil
> on a side,
> > I was going to use pads of diameter 80, hole 52. This
> sound reasonable.
> >
> > 7) For a thick track, say 30mil to 50mil, is it normal to
> use multple
> > small vias ?
> >
> > Any other pointers welcome.
> > Any help greatly appreciated.
> >
> > Regards
> > Paul
> >
> > --
> > Myrica Networks, Inc. Paul Cooper
> > 4350 Executive Drive, Suite 200 [EMAIL PROTECTED]
> > San Diego, CA 92121 (858) 362-0850 (Fax 0855)
> >
> >
> >
> >
>
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