Just remember to balance you layer stack thicknesses to prevent the board
from being warped.
----- Original Message -----
From: "Jon Elson" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Thursday, February 21, 2002 3:59 PM
Subject: Re: [PEDA] help with a stack ??


> Robison Michael R CNIN wrote:
>
> > hello,
> >
> > i've got a negative (ECL) and a positive (TTL) power plane
> > on a board i'm doing.  right now i'm figuring on a matching
> > ground plane for each power supply, spaced close to the
> > rail for switching capacitance.  here's the stack i'm
> > thinking of:
> >
> > critical traces
> > gnd
> > -5.2V
> > noncritical traces
> > noncritical traces
> > +5V
> > gnd
> > critical traces
> >
> > does this seem reasonable?  i have some semblance of controlled
> > impedance with each trace layer referenced to a dc plane.
> > other stacks suggestions are welcomed.
>
> Well, depending on how the board fabricator will actually assemble the
> "book" of laminates and prepregs, it should be doable.  I guess the
> critical
> thing is to make sure the critical traces and ground are etched from a
> double-sided laminate, then the non-crit traces and power will be on
> other
> laminates, so you end up with 4 double-sided laminates.  This could
> cause the noncritical traces to be awfully close together, but also the
> power and ground planes will be close together, giving more distributed
> capacitance.
>
> I have done a lot of ECL and mixed ECL/TTL/CMOS mixed analog/digital
> boards, mostly on 4 layers.  I generally have only one gnd plane and one
>
> split power plane.  Some of the power planes get very complicated, with
> interdigitated (zig-zag) voltage regions to bring power under the pads
> where it is needed.  Some of the inputs to these boards are pretty
> tightly
> controlled impedances, and so signals on one side are using the gnd for
> a ground plane, and signals on the other side use the power planes for
> ground plane.  I've never really had a problem with the ground plane
> issues.  I have had crosstalk, and had to completely re place one board
> to make the signal flow in, around and out without high level digital
> signals ever crossing over low level analog signals (this was on a
> 6-layer
> board, so I ended up using two signal layers on one side of the
> power-gnd
> planes for analog, and the other side for digital.)
>
> For a board like you propose, I would try to use only one gnd plane, and
>
> use split planes for the + and - voltage supplies.  This might get you
> down to a 6 layer board, and cut costs.
>
> > but i need both the ground planes common to each other.
> > can i EVEN have two planes called GND?  is having two ground
> > planes a bad idea?  if two ground planes is not a bad idea,
> > then how do i tie them together?  NOTE:  if i tie them together
> > i would like to do it in a way that doesn't mess up my design
> > rules check.  i've noticed that additional vias and traces
> > added to a pcb outside the schematic can make the design rules
> > check flag them.
>
> Yeah, I think Protel may have a problem with this.  If you have 2
> planes assigned to net GND, then every via or through-hole that
> is assigned to net GND will probably have a thermal connection to
> BOTH planes.  This may be fine, electrically, but may cause problems
> in solderability, and certainly will drive techs doing any rework
> nuts.
>
> > i have another question.  this is iffy, but i'm a heathen
> > designer anyway.  this is just a proto board, and although i'd
> > like controlled impedance, i don't want to pay for it.  SO,
> > what i am thinking is that if i get an 8-layer board at the
> > standard 62 mil thickness, that they are going to be just about
> > forced to give me between 6 to 8 mils between layers, without
> > me ever having to spec it.  does this sound right?
>
> I don't think a good board house will charge extra for this, if
> you figure it out in advance.  DON'T design the board in a vacuum,
> ie. figure out what you want and then submit the design.  Call
> the board fab of your choice, and get them to TELL YOU what
> they will use for laminate thickness for this build-up.  THEN, you
> just use that info to calculate trace width.  That way, your job
> fits in with their preferred flow.
>
> How tight a controlled impedance is this?  I routinely work with stuff
> where analog signals need controlled impedance of 50 Ohms +/- 1 Ohm,
> or there are serious reflections.  To keep ECL happy, you don't need
> that tight a control, especially if the traces are short.  +/- 10 %
> should
> be close enough, and that is much easier to provide.
>
> Jon
>
>
>


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