It's true that 16V8s are pretty much over hill, but there's one thing that will keep 
them
alive from a long time to come.  They can dissipate over a watt-and-a-half without 
frying and
without a heat sink. Short of discrete transistors, they are still the cheapest LED 
drivers
available and you get all the decoding logic in the same package!

Matt Polak wrote:

>          Hey Gary!
>
>          Glad to hear you got it all working! Gotta love that
> characteristic quirkyness of Protel to keep you on your feet and
> occasionally frustrate you for a few hours here and there, eh? It's all
> somehow worth it in the end. :>
>
>          Another package you may want to consider grabbing (it's free!) is
> Xilinx Webpack. (www.xilinx.com) It does CPLD fitting for older logic, as
> well as the Xilinx series of CPLDs, as well as most all of Xilinx's FPGA
> parts. It also includes JTAG programming for most all parts, through a
> cable that costs about $5 in parts to build and who's schematic is provided
> free in the appnotes.
>
>          I was originally doing quite a bit of work with the 16V8s, but
> they're really starting to get phased out these days, and I was usually
> having to use a half-dozen of them on a board at once. You may want to look
> at some CPLD parts like the XC9536 and XC9572 from Xilinx. They're a couple
> bucks in single quantity, Digikey stocks them, and they're reprogrammable
> thru JTAG in your circuit! No more crash + burn ZIF socket testing. You can
> essentially replace a handful of 16V8s with a 9536, have a tiny footprint,
> cost less, be easier to (re)program, and best of all use the same logic
> expressions and such that you're using for your 16V8s!
>
>          And I definitely second your opinion about this mailing list. It's
> been an amazingly useful resource with a lot of helpful and friendly
> people. :> Good luck with your design!
>
> Regards,
> -- Matt
>
> At 03:51 AM 3/10/2002 -0800, you wrote:
> >3/10/02
> >
> >Matt,
> >
> >Thank you very much.  I created sixteen different plds and wrote 560 lines
> >of simulation
> >code to test them.  With the exception of a few typos, everything moved
> >along without any
> >problems.  In the past I have always used Palasm to prepare PLD files, but
> >with my new 2GHz
> >computer, I figured it was time to leave the old Dos crap (though easy to
> >use) behind
> >(except for Autotrax, even though I'll never use it again, I still like
> >having loaded just
> >in case...my all time favorite love/hate relationship).
> >
> >Considering this was my first experience with CUPL, I was suprised at how
> >smoothly
> >everything went, although I was puzzled at why no .jed files were showing
> >up as I completed
> >each part.  Even the .SO and waveform outputs worked perfect.  After
> >completeing the last
> >part, needless to say, without the .jed file all else is a waste of time.
> >I spent more time
> >reading and rereading the tutorials, the handbook and the website trying
> >to figure out how
> >to get the damn .jed files.
> >
> >After getting your response I opened 99SE and looked in the ddb folder and
> >still no .jed
> >files.  Still hopeful, I shut down 99SE, opened Windows Explorer and
> >looked in the ddb root
> >folder again and BINGO! There they were, all sixteen .jeds.  This is
> >classic Protel
> >mentality.  Since they fixed the endless file backup problem, I never
> >bother to look in the
> >root file anymore.  What truly surprises me is that you  can't see the
> >.jed files when
> >you're in the 99SE evironment!  Go figure...
> >
> >Thanks again.  This is the best user group I have ever subscribed to,
> >certainly the one
> >with not only the most problems but the most difficult.  Very competent group.
> >
> >Gary Packman
> >
> >Matt Polak wrote:
> >
> > >          Hey Gary (et al),
> > >
> > >          I've been using Protel to generate JEDECs for GAL16V8's and
> > > similar for the past year or so without difficulty, though SOME quirkyness
> > > in getting Protel to process the files and output correctly.
> > >
> > >          As an example, the stripped down header from one of my PLD files
> > > (called 'decoder.pld' inside Protel) looks like this:
> > >
> > >
> > 
>/*************************************************************************************/
> > > /*  Advanced PLD99: Schematic to CUPL
> > > translator                                     */
> > >
> > 
>/*************************************************************************************/
> > > /*  Translated at
> > > 04:50:46                                                           */
> > > /*             on
> > > 20-Nov-2000                                                        */
> > >
> > 
>/*************************************************************************************/
> > > NAME     sigdecoder;
> > > DATE     12/20/2000;

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