Here is more detail information like asked.
Track widht of plit plane wich is on internal powerplane1
is 15mil. Dimensions of VIA are diamer=24 hole=12 (PAD I
also tested is same size). All distances are measured from
the edge of the parts. I can not figure out what else information
I could share wich could help You and me. :I
Like I said, I can send You a picture (*.GIF) where are two VIA,
split plane tracks and distances. I also made a *.PCB wich I can

Juha Pajunen, Hw Engineer

-----Original Message-----
From: Brad Velander [mailto:[EMAIL PROTECTED]]
Sent: 23. toukokuuta 2002 18:15
To: 'Protel EDA Forum'
Subject: Re: [PEDA] Clearance between VIA and power plane (split plane)

        I think that in order for anybody to help you they must give a few
more details to your problem. You do not mention the size of the via (pad
and hole), width of the split plane line, are you measuring these distances
from the edge or the center of that pad/via, etc., etc.. Then somebody may
be able to figure out what may be happening to you.
        Further to those issues, it almost seems as though your described
problem may be a bug. In which case someone may say, just move your via to
some point other then 3.6mils or 13.12 mils. Why would your via need to be
precisely at those locations? Move them slightly and your problem will go
away as you had stated in your earlier post.

Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010

> -----Original Message-----
> From: Juha Pajunen [mailto:[EMAIL PROTECTED]]
> Sent: Wednesday, May 22, 2002 10:15 PM
> To: Protel EDA Forum
> Subject: [PEDA] Clearance between VIA and power plane (split plane)track
> Hi,
> Can anyone help me with my clearance problem.
> Clearance between VIA and power plane (split plane)
> track (primitive). If I place a VIA to split plane,
> it connects to plane and there is a relief. When I move
> that VIA near green track wich is part of defined
> split plane, DRC gives a short-circuit error.
> When the distance between the VIA and the power plane track
> (track is vertical) is 3.6mil, DRC does not give a
> short-circuit error. Clearance rule for whole board is 7mil.
> Then there is a track on power plane wich is rotated 45 degree,
> if distance between the VIA and the power plane track is 13.12mil,
> DRC does not give a short-circuit error.
> If I change the VIA with same size PAD there is NO DRC error.
> What are those distances (3.6 and 13.12mil), where those
> are from and how to control them?
> Why VIA and PAD does not act same way?
> Hope You can understand what I mean!
> I can send You a *.GIF, if you like to see more...
> Thank you...
> Sincerely,
> Juha Pajunen, Hw Engineer
> Bitboys Oy
> ------------
> NOTE:  This message, and any attached files, may contain
> privileged or confidential information.  It is intended for 
> use only by the
> designated recipients.  Any disclosure, copying or distribution of, or
> reliance upon, this message by anyone else is strictly prohibited.

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
* To leave this list visit:
* http://www.techservinc.com/protelusers/leave.html
* Contact the list manager:
* Forum Guidelines Rules:
* http://www.techservinc.com/protelusers/forumrules.html
* Browse or Search previous postings:
* http://www.mail-archive.com/proteledaforum@techservinc.com
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

Reply via email to