Interesting thread... The reason 4 way ties are 'verboten', is actually because of the potential for mis-interpretation of the circuit. A copy of a schematic on a Xerox, or blueprint machine.. (that dated me), may have a 'spec' or 'splotch' or piece of 'terra firma' or other foreign object encrusted upon the glass and can transfer an imaged 'dot' to the surface of the copy, thereby potentially connecting two crossing lines un-intentionally. The rule was invented to avoid having that scenario misconnect a schematic line accidentally. They also had us draft them large to avoid the same problem. Some of you may remember the old 'hump' at crossovers we used to use to make sure no one mis-interpreted the cross over as a connect spot. We did away with those in preference to the simpler connect dot rule. That's the one you see now on CAD schematic capture systems.
Bill Brooks PCB Design Engineer , C.I.D., C.I.I. TITAN SYSTEMS CORPORATION DATRON WORLD COMMUNICATIONS DIVISION 3030 Enterprise Court, Vista, CA 92083 Email: [EMAIL PROTECTED] Website: http://www.dtwc.com/ Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510 _______________________________________ Bill Brooks Adjunct Instructor - DT210 PCB Design, RM E13 Palomar College , Trades and Industries Dept. 1440 West Mission Road San Marcos, CA 92069-1487 Tel: (760)744-1150 Ext 5584 [EMAIL PROTECTED] http://www.palomar.edu/ _______________________________________ Member of the San Diego Chapter of the IPC Designers Council Communications Officer, Web Manager http://www.ipc.org/SanDiego/ http://home.fda.net/bbrooks/pca/pca.htm -----Original Message----- From: Andrew Jenkins [mailto:anjen1@;ameritech.net] Sent: Saturday, October 19, 2002 8:17 AM To: Protel EDA Forum Subject: Re: [PEDA] OT Rebuttal WARNING!!! Junctions at + points Didn't have time to reply til now... > From: Abd ul-Rahman Lomax [mailto:abd@;lomaxdesign.com] > > At 09:19 AM 10/14/2002 -0400, [EMAIL PROTECTED] wrote: > > >Bug's a bug's a bug, and that's what the original post > endeavored to report. > > We agree that the disappearance of a junction is a bug. Do we? Good, then I've just saved several months of unnecessary argument over Lomaxian "trivialities". It's well worth having lil'Danny Lomax rebuke me for sloppy schpellink to hear that admission so quickly. > It is true that, sometimes, a four-way junction > can represent a circuit jst a little more compactly > can two three-way junctions. Yes, it is. But even more important, it can often illuminate purpose, instead of unnecessarily disguising or otherwise confusing a circuit or subcircuit's basic purpose (whether by intentional or _ignorant_ oversight), which is, in my experience, often times the outcome of the unthinking usage of drafting-school rules. > The compactness > is not at all worth the potential confusion. To whom? Draftsmen, or those who actually originate the ideas from which draftsmen cull their daily bread? Eye of the Beholder...I prefer to avoid those who blindly think inside the box, and I surely don't attempt to make friends with them, be they draftsmen or doctors or anywhere in between. I would argue just the opposite as you and your color-blind fellows, that _arbitrarily_ applying drafting rules to electrical schematics is not at all worth the potential confusion to dissemination of the ideas which they contain. Not that I believe four-way junctions should be used indiscriminately, but that they should not be avoided universally simply to comply with grunted dogma. >Frankly, I'd design the software to *reject* four-way junctions. Try to >make one, it would refuse (and suggest alternatives). Load one, it >would flag it as an error. Yes, I'm sure you would. And that comment by itself makes it all the more important for someone to state clear objection to your third-tier dogma, to hopefully avoid future "accidental" losses of important code from EDA packages at the behest of misguided advisors like you. And remember, Danny, always fall back on pedantic argumentation in _liue_ of substance. After all, when all else fails, you may as well attempt to make headway by mocking typos, whether actual (transitor), or perceived, as by one with an obviously inflexible, dotardly sense of language... Shoe_Fit aj See: H-Bridge, http://www.national.com/ds/LM/LMD18201.pdf anyone? I/O (diode) clamp http://www.semiconwell.com/jd_net/swdn006.htm? Transistor amp http://www.ele.auckland.ac.nz/info/techos/design/tools/ampli.htm http://www.swarthmore.edu/NatSci/echeeve1/Ref/Amplifiers/ ?, etc. http://www.physics.pacificu.edu/hall/electronics/ElecHWTrans.html http://www.research.microsoft.com/~gbell/Computer_Engineering/00000126.htm http://www-ece.rice.edu/~jdw/242_lab4/exp4.3.html http://www.du.edu/~etuttle/electron/elect8.htm http://www.williamson-labs.com/480_xtor.htm#emitter-follower http://freehost05.websamba.com/electronicsclub/amp_config/config.htm http://www-s.ti.com/sc/ds/sn74f1018.pdf http://www.californiamicrodevices.com/products/data/pdf/pac_dn010.pdf P.S. Did I say "blah blah blah"? I'm infinitely amused by dogmatic idiots. - Never confuse a cloak of authority with actual authority. One can always buy or steal a cloak. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:proteledaforum@;techservinc.com * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:ForumAdministrator@;TechServInc.com * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@;techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
