On 08:13 AM 4/12/2002 -0500, Jenkins, Charlie said:
Ian, Thankyou for your recap of DXP history.  I have had exactly those

One item I would like to know if they improved was the ERC for parts with
multiple pins of the same pin number.  This could be a module with 4
mounting holes that all get ground nets and you do not want to put them all
on the schematic symbol.  Or the classic TO-220 with the tab hole and pin 2
connected to the same net. P99SE seems to have a hard time with the two "pin
2" pads, both from connectivity and ERC.

I recently built a dual component dip footprint for through hole or SMT lead
form optocouplers.  There was a SMT pad touching the usual through hole dip
pad.  Each pad pair had the same number.  Both received the net name from
the netlist import but sporadic DRC errors showed up, mostly clearance, on
random pins.  I still have not been able to come up with a rule set that
clears the errors.

Does DXP handle those items better?
One whole area that is much more powerful is the rules system. I have found that if you can't find a rule that allows something you can (generally) create a set of rules that excludes something from being checked. This can be done with good precision. So in your case, even if there was no way of making a rule that allowed these two footprints to overlap it is possible to modify the basic rule (Whole Board-Whole Board scope in P99SE language) so it no longer checks clearances between these components, while maintaining . Something like:
First scope: Not InComponentClass('OverlaidHeaders')
Second: All

where 'OverlaidHeaders' is a component class with the overlapping components.

I haven't tested this exact example but I have just done a design where connectors were overlapping a little and I set up such a rule.

There is a request in to Altium, wanted by a number of designers, for clearance checking to support negative clearances, that is being able to test for defined overlaps. More elaborate schemes have also been discussed. There has been no word on this as far as I know though.

As for multiple pins with the same number in Sch and PCB - I do not know. It is not something I do, for me the TAB on a TO220 is a separate "pin" to the centre pin and I label it as such (TAB). Similarly for things like SOT-223 etc. Same goes for devices with multiple mounting holes of gnd pins (eg SMA/SMC/MCX connectors).

So to answer your question: Yes to the overlapping components. Dunno whether there is any change for multiple pin numbers - I have not tried.


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