Additionally to Peter's advice,
        make sure that the DRC configuration has "Unrouted Net Constraints" checked as 
well as any other parameters you consider key to checking the PCB.
        The unrouted net constraints is the DRC check that will find unrouted nets, it 
also finds unplated pads and reports them as unrouted nets which is an annoyance at 
times. I wish it had the capability to determine if the unplated pad actually resulted 
in a real unconnected net not just reporting every unplated pad as a possible unrouted 
net.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com


> -----Original Message-----
> From: Peter Bennett [mailto:[EMAIL PROTECTED]
> Sent: Monday, June 23, 2003 1:10 PM
> To: Protel EDA Forum
> Subject: Re: [PEDA] design verification
> 
> 
> Lydia Ramos wrote:
> > I'm very new to Protel.
> > What are the steps to follow to ensure the PCB design is routed
> > completely?
> > Thanks,
> > Lydia
> 
> Do a Design Rules Check when you think you are done.  If DRC 
> shows any errors, 
>   correct them where possible, and be _sure_ that any 
> remaining errors are 
> acceptable.
> 
> -- 
> Peter Bennett
> TRIUMF
> 4004 Wesbrook Mall, Vancouver, BC, Canada
> GPS and NMEA info and programs:
> http://vancouver-webpages.com/peter/index.html


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