I just ran into a new problem in P99SE (SP6) using the VHDL netlist feature
that I didn't even know was there until recently. If you have a multi-sheet
schematic, and try to get the VHDL for each sheet separately, the first sheet
works, but then when you try to generate the netlist for the 2nd sheet, Protel
goes off into never-never land, eats up all the virtual memory, and eventually
generates a file with 64000 lines that say Line=000123, etc. numbering all
the lines, and then the VHDL is at the end of that. If you completely close
Protel and restart, it works fine, for one sheet only.


I can't do all the sheets in the project at once, because of the horrible way
Protel doesn't handle hierarchical shematics. And, I don't want to flatten
sheets that have 16 references to sub-sheets.


It is really a pain to have to shut down Protel every time you want to edit a
sheet and generate a new netlist. Does anyone have any idea why this is
happening, and anything to make it work right? It seems like I didn't
have this problem a few days ago, and then it started happening intermittently
at first. It seems Protel tries to read some other file, and combine the
contents of that with the VHDL file it is creating.


Thanks for any thoughts on this,

Jon



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