Hi all,
I am a signal integrity analysis virgin until today.  However, it occurred
to me that the software must generate a spice netlist which represents the
PCB area of interest.  Our IC designers could really do with this, so they
can add it to their simulations.  Does anyone know how I can get this spice
netlist information out of Protel?  Perhaps there is something I could
access through writing a macro...?

Any ideas?

Dave Watling




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